Woodside, California
United States
35
2024-11-07
The entities that hold a legal rights for patent applications filed by inventor Zerbe Jared:
Jared Zerbe from Woodside, US has applied for patents for these inventions. The list has both pending applications and granted patents:
DATA TRANSMISSION USING DELAYED TIMING SIGNALS
#2 | 2023-03-09Data transmission using delayed timing signals
#3 | 2020-12-10Data transmission using delayed timing signals
#4 | 2018-05-24Data transmission using delayed timing signals
#5 | 2016-12-01Method and apparatus for evaluating and optimizing a signaling system
#6 | 2015-07-23Methods and systems for transmitting data by modulating transmitter filter coefficients
#7 | 2015-03-19Method and apparatus for evaluating and optimizing a signaling system
#8 | 2015-02-05Methods and circuits for reducing clock jitter
#9 | 2014-10-02Data transmission using delayed timing signals
#10 | 2014-06-05Methods and circuits for reducing clock jitter
#11 | 2013-10-17Method and apparatus for evaluating and optimizing a signaling system
#12 | 2013-10-17Method and apparatus for evaluating and optimizing a signaling system
#13 | 2012-07-05Fast power-on bias circuit
#14 | 2012-06-14Method and apparatus for evaluating and optimizing a signaling system
#15 | 2012-04-12Techniques for adjusting clock signals to compensate for noise
#16 | 2011-08-25Regulation of memory IO timing using programmatic control over memory device IO timing
#17 | 2011-05-05Reducing power-supply-induced jitter in a clock-distribution circuit
#18 | 2010-12-16High-speed source-synchronous signaling
#19 | 2010-09-30Method and apparatus for evaluating and optimizing a signaling system
#20 | 2010-06-10Methods and systems for transmitting data by modulating transmitter filter coefficients
#21 | 2010-06-03Receiver with clock recovery circuit and adaptive sample and equalizer timing
#22 | 2009-11-17Technique for determining an optimal transition-limiting code for use in a multi-level signaling system
#23 | 2007-11-20Circuit, apparatus and method for adjusting a duty-cycle of a clock signal in response to incoming serial data
#24 | 2007-07-19METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
#25 | 2007-03-22Method and apparatus for evaluating and optimizing a signaling system
#26 | 2007-02-20Technique for utilizing spare bandwidth resulting from the use of a code in a multi-level signaling system
#27 | 2007-02-20Technique for utilizing spare bandwidth resulting from the use of a transition-limiting code in a multi-level signaling system
#28 | 2007-02-20Technique for utilizing spare bandwidth resulting from the use of a transition-limiting code in a multi-level signaling system
#29 | 2006-11-14Method and apparatus for evaluating and optimizing a signaling system
#30 | 2006-10-19Method and apparatus for evaluating and optimizing a signaling system
#31 | 2006-10-19Method and apparatus for generating reference voltage to adjust for attenuation
#32 | 2006-10-05Circuit, apparatus and method for capturing a representation of a waveform from a clock-data recovery (CDR) unit
#33 | 2006-07-11Circuit, apparatus and method for capturing a representation of a waveform from a clock-data recovery (CDR) unit
#34 | 2006-07-04Method and apparatus for generating multi-level reference voltage in systems using equalization or crosstalk cancellation
#35 | 2005-03-29Method and apparatus for evaluating and calibrating a signaling system
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