Yan Li

INFERENCE PROCESSING UNIT WITH HIGH BANDWIDTH NON-VOLATILE MEMORY NEAR MEMORY COMPUTING

NON-VOLATILE MEMORY ARRAY WITH INTEGRATED MEMORY AND ACCESS TRANSISTORS AND METHOD OF MAKING THE SAME

COMPUTE-IN-MEMORY USING NEURAL NETWORKS STORED IN A NON-VOLATILE MEMORY FOR PREDICTIVE BLOCK HEALTH ASSESSMENT OF THE NON-VOLATILE MEMORY

HIGH BANDWIDTH NON-VOLATILE MEMORY

HIGH BANDWIDTH NONVOLATILE MEMORY DEVICES

MEMORY DIE WITH ON-CHIP BINARY VECTOR DATABASE SEARCH

MEMORY DIE WITH ON-CHIP BINARY VECTOR DATABASE SEARCH

Error Correction Methods for Computational SSD Supporting Rapid File Semantic Search

Computational SSD Supporting Rapid File Semantic Search

Configurable capacitors with 3D non-volatile array

Fast search for leaky word line

Simulating memory cell sensing for testing sensing circuitry

Compute in memory three-dimensional non-volatile nor memory for neural networks

Soft data compression for non-volatile memory

Fixed size soft bit lossy compression in flash memory

Optimized neural network data organization

PRE-COMPUTATION OF MEMORY CORE CONTROL SIGNALS

Pre-computation of memory core control signals

Pipelined micro controller unit

Dynamic re-evaluation of parameters for non-volatile memory using microcontroller

CAM storage schemes and CAM read operations for detecting matching keys with bit errors

Microcontroller for non-volatile memory with combinational logic

Optimized neural network data organization

System and method for a reconfigurable controller bridge chip

Microcontroller architecture for non-volatile memory

Microcontroller architecture for non-volatile memory

CAM storage schemes and CAM read operations for detecting matching keys with bit errors

Three-dimensional memory device having bonding structures connected to bit lines and methods of making the same

Bonded assembly containing memory die bonded to integrated peripheral and system die and methods for making the same

Bit line voltage control for damping memory programming

Manufacturing process for separating logic and memory array

Three-dimensional memory device having bonding structures connected to bit lines and methods of making the same

Memory controller assisted address mapping

Manufacturing process for separating logic and memory array

Bit line voltage control for damping memory programming

Bifurcated memory die module semiconductor device

Microcontroller architecture for non-volatile memory

Microcontroller instruction memory architecture for non-volatile memory

Signal reduction in a microcontroller architecture for non-volatile memory

Increased terrace configuration for non-volatile memory

Multicore on-die memory microcontroller

Sense circuit with two sense nodes for cascade sensing

Adaptive temperature and memory parameter throttling

Bad column management with data shuffle in pipeline

Within-array through-memory-level via structures and method of making thereof

Through-memory-level via structures between staircase regions in a three-dimensional memory device and method of making thereof

Independent multi-plane read and low latency hybrid read

Independent multi-plane read and low latency hybrid read

Methods and systems to avoid false negative results in bloom filters implemented in non-volatile data storage systems

Fast-reading NAND flash memory

Multipass programming in buffers implemented in non-volatile data storage systems

Direct multi-level cell programming

Method and apparatus for program and erase of select gate transistors

Reading soft bits simultaneously

Method and apparatus for program and erase of select gate transistors

Simultaneous sensing of multiple wordlines and detection of NAND failures

Direct multi-level cell programming

Defect or program disturb detection with full data recovery capability

Fast-reading NAND flash memory

Bad column management with bit information in non-volatile memory systems

Non-volatile memory programming data preservation

Programming non-volatile storage system with multiple memory die

Method and apparatus for program and erase of select gate transistors

Use of bloom filter and improved program algorithm for increased data protection in CAM NAND memory

CAM NAND with or function and full chip search capability

Data search using bloom filters and NAND based content addressable memory

Architectures for data analytics using computational NAND memory

De-duplication system using NAND flash based content addressable memory

De-duplication techniques using NAND flash based content addressable memory

Key value addressed storage drive using NAND flash based content addressable memory

NAND flash based content addressable memory

NAND flash based content addressable memory

On-device data analytics using NAND flash based intelligent memory

CAM NAND with OR function and full chip search capability

Key-value addressed storage drive using NAND flash based content addressable memory

Peak current management in multi-die non-volatile memory devices

NON-VOLATILE STORAGE WITH JOINT HARD BIT AND SOFT BIT READING

Direct multi-level cell programming

Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof

Simultaneous multi-level binary search in non-volatile storage

Column redundancy circuitry for non-volatile memory

Immunity against temporary and short power drops in non-volatile memory

Immunity against temporary and short power drops in non-volatile memory: pausing techniques

Non-volatile memory and method with improved first pass programming

Method for non-volatile memory with background data latch caching during read operations

Compact sense amplifier for non-volatile memory

Compact sense amplifier for non-volatile memory suitable for quick pass write

High endurance non-volatile storage

Combined simultaneous sensing of multiple wordlines in a post-write read (PWR) and detection of NAND failures

Program algorithm with staircase waveform decomposed into multiple passes

Compensating for coupling during programming

Bad column management with bit information in non-volatile memory systems

Simultaneous multi-state read or verify in non-volatile storage

Program cycle skip

Non-volatile memory and method with power-saving read and program-verify operations

Program cycle skip

Non-volatile memory and method for power-saving multi-pass sensing

Programming and selectively erasing non-volatile storage

MANUAL SUSPEND AND RESUME FOR NON-VOLATILE MEMORY

Alternate page by page programming scheme