SANDISK TECHNOLOGIES INC.

STACKED MEMORY ASSEMBLY WITH FAILURE DETECTION AND REPAIR

ATS Endpoint Optimization For Storage Workloads

LOW COMPLEXITY BIT-ERROR-RATE ESTIMATION FOR ENCODED FOGGY-FINE PROGRAMMING

APPARATUS AND METHODS FOR RECOVERING POWER ON READ FAILING DIE

REVERSE READ WITH LOCKOUT FOR NON-VOLATILE MEMORY

NON-VOLATILE MEMORY WITH ENHANCED FOGGY-FINE ENCODING

REGION DEPENDENT CURRENT STATE SPACING FOR IN-MEMORY COMPUTE

DYNAMIC PRIORITY INVERSION FOR HOST MEMORY BUFFER HANDLING BASED ON A SYSTEM STATE

Data Storage Device and Method for Direct Data Quantization in Multi-Level-Cell Memory

SOLAR POWER BASED MEMORY REFRESH IN A DATA STORAGE DEVICE

Optimized KV Metadata Storage for Machine Learning Applications

READ RETRY WITH PHYSICAL DEFECT JUDGEMENT

Selective Panic Mitigation

Data Storage Device and Method for Value-Proposition-Based Data Retrieval

BLOCK TO BLOCK TESTING WITH SINGLE SET OF CGI LINES

BREAKDOWN MITIGATION FOR PROGRAMMABLE RESISTANCE MEMORY ELEMENT

Efficient Address Translation Cache Invalidation in Data Storage Devices

Converting DIX to DIF for Host Device

NONVOLATILE MEMORY WITH VOLTAGE OVERSHOOT MITIGATION

Communication with a Data Storage Device with a Web Application

Efficient Data Access for Accelerated Administrative Commands

Self-Tracking Dynamic Allocation of Free Chunks at L2P in Thin Provisioning

Unlocking a Data Storage Device Using a Web Application

OFFSET CALIBRATION SCHEMES IN TIME-BASED 3D NAND-BASED VECTOR-MATRIX MULTIPLIER CIRCUIT

NON-VOLATILE MEMORY WITH LOCATION DEPENDENT CONTROL GATE VOLTAGE

NONVOLATILE MEMORY WITH MULTI-CELL WEIGHT STRUCTURE

Apparatus for Persistent Memory Management

TRANSIENT STATE MANAGEMENT OF AN INPUT/OUTPUT IMPACTED STORAGE DEVICE

Apparatus For Allowing The Protected mSets To Continue To Be Used During Control Sync (CS) On The Base Of Shadow uLayer

Data Storage Device and Method to Access Logical Block Range

OPERATING IN A WRITE THROUGH MODE TRANSITION WHILE MAINTAINING DATA INTEGRITY AFTER AN ABRUPT SHUTDOWN ON A STORAGE DEVICE

SGS VOLTAGE IN UNSELECTED BLOCKS DURING PROGRAM

Data Storage Device and Method for Maintaining a Weightage of Commands in a Plurality of Queue Layers

Adaptive Host Memory Buffer Traffic Control

Intelligent Data Duplication/Backup

NAND ACCELERATOR FOR VECTOR-VECTOR MULTIPLICATION

Host Controlled Mitigation of Panic Situation

Data Storage Device and Method for Avoiding Returning Zeros to a Host

Data Storage Device and Method for On-the-Fly Mathematical Processing of Data Read from the Data Storage Device

SYNCHRONIZATION POINTS BASED PARAMETER TUNING IN A STORAGE DEVICE

EFFICIENT TRAINING METHOD FOR UNMATCHED DATA OUTPUT PATH IN NON-VOLATILE MEMORY

NON-VOLATILE MEMORY WITH NON-DISCHARGING READ

APPARATUS AND METHODS FOR MODIFYING IMPEDANCES IN TIME-BASED VECTOR-MATRIX MULTIPLICATION CIRCUITS

PRE-CHARGE UNSELECTED BLOCK WORD LINE BEFORE PROGRAM

PCIe LANE ADAPTER FOR ENABLING FLEXIBLE SWITCHING OF SPEED AND CAPACITY CONFIGURATIONS OF STORAGE DRIVES

TAMPER-RESISTANT MICROELECTRONIC CIRCUIT PACKAGES

CHARGE PUMP CIRCUIT CONFIGURATION IN NONVOLATILE MEMORY

DIE LEVEL FAILURE RECOVERY

POWER ON DATA RETENTION MANAGEMENT WITH DYNAMIC ACTIVATION ENERGY TABLE FOR NON-VOLATILE MEMORIES

THROUGHPUT OPTIMIZED 3D NAND-BASED VECTOR-BY-MATRIX MULTIPLIER CIRCUIT

AREA EFFICIENT 3D NAND-BASED VECTOR-MATRIX MULTIPLIER CIRCUIT WITH COMMON-MODE CURRENT CANCELLATION

Dynamic Lane Allocation On Power Limited, Dual Port PCIe Device

Command Processing In Sequential Write Required Zone

STRUCTURES AND METHODS FOR ACCURATE SEGMENTING OF BAD BLOCKS OF NON-VOLATILE MEMORY

MITIGATING BIT LINE IR DROP IN 3D NAND NEURAL NETWORK ACCELERATOR

SEMICONDUCTOR DEVICE WITH STRUCTURALLY REINFORCED CORNERS

MULTI-PLANE LEAKAGE DETECTION IN NONVOLATILE MEMORY

GATE-INDUCED DRAIN LEAKAGE PRE-CHARGE IN SUB-BLOCK MODE FOR THREE OR MORE TIER NON-VOLATILE MEMORY STRUCTURE

NON-VOLATILE MEMORY WITH ADJUSTABLE ERASE VOLTAGE

MEMORY STRUCTURE WITH SECURE GLOBAL ERASE

COUNTERMEASURE FOR DRAIN-SIDE SELECT GATE UPPER TAIL

ADDRESS PATH ROUTING REDUCTION STRATEGY FOR NONVOLATILE MEMORY DECODERS

BIPOLAR DECODERS FOR NONVOLATILE MEMORY WITH SPIKE ATTENUATION FOR THRESHOLD SELECTOR SWITCHES

MULTI-PLANE NONVOLATILE MEMORY WITH SERIAL ENCODER AND DECODER CIRCUITS

Data Storage Device and Method for Resource Optimization in Video Processing

Dynamic Clustering-Based Allocation of Free Chunks at L2P in Thin Provisioning

OPTIMIZING DATA RETRIEVAL FROM STORAGE DEVICES

DEVICES AND METHODS FOR TERMINATING TRANSMISSION LINES

MULTI SENSE TIME VALLEY SEARCH IN NAND

CROSS TEMPERATURE NAND READ ADJUSTMENT

Data Storage Device and Method for Reusing a Hardware Encoder in a RAID Recovery Operation

LINK RECEIVER CIRCUITRY FOR CONTROLLER-MEMORY DEVICE INTERFACES IN DATA STORAGE DEVICES

PROGRAMMING NON-VOLATILE MEMORY WITH NARROW THRESHOLD VOLTAGE DISTRIBUTIONS

Data Storage Device and Method for Providing an Efficient Multitenancy Arrangement in High-Capacity Data Storage Devices

Write Amplification Reduction with Sub-Indirection Unit (IU) Hinting

SPARE BLOCK POOL MANAGEMENT IN STORAGE DEVICES

DUAL WORD LINE ALL-STRING PREPROGRAM FOR LATERAL DATA RETENTION IMPROVEMENT

HOLE PRE-CHARGE FROM BITLINE SIDE TO ENABLE FULL REVERSE ORDER PROGRAM SUB-BLOCK MODE

Selective Information Sharing Between Different Storage Devices

PROCESSING CORE INCLUDING INTEGRATED HIGH CAPACITY HIGH BANDWIDTH STORAGE MEMORY