Los Altos, California
United States
118
2026-03-05
The entities that hold a legal rights for patent applications filed by inventor Tsern Ely:
Ely Tsern from Los Altos, US has applied for patents for these inventions. The list has both pending applications and granted patents:
DYNAMIC RANDOM ACCESS MEMORY (DRAM) COMPONENT FOR HIGH-PERFORMANCE, HIGH-CAPACITY REGISTERED MEMORY MODULES
#2 | 2025-08-21Sleep Phase Dependent Temperature Control and Learning Methods to Optimize Sleep Quality
#3 | 2025-07-17MEMORY SYSTEM WITH THREADED TRANSACTION SUPPORT
#4 | 2025-06-19DRAM RETENTION TEST METHOD FOR DYNAMIC ERROR CORRECTION
#5 | 2025-06-05Sleep Platform Pneumatics Management System
#6 | 2025-05-29Adaptive Sleep System Using Data Analytics and Learning Techniques to Improve Individual Sleep Conditions
#7 | 2025-03-13MEMORY REPAIR METHOD AND APPARATUS BASED ON ERROR CODE TRACKING
#8 | 2025-01-16HIGH PERFORMANCE PERSISTENT MEMORY
#9 | 2024-11-07DATA TRANSMISSION USING DELAYED TIMING SIGNALS
#10 | 2024-05-09OPTIMIZING SLEEP PERSONALIZATION USING LEARNING METHODS ACROSS MULTIPLE USERS AND BED PLATFORMS
#11 | 2024-04-04Memory repair method and apparatus based on error code tracking
#12 | 2024-04-04Memory system with threaded transaction support
#13 | 2024-03-28DYNAMIC RANDOM ACCESS MEMORY (DRAM) COMPONENT FOR HIGH-PERFORMANCE, HIGH-CAPACITY REGISTERED MEMORY MODULES
#14 | 2024-01-18High-performance, high-capacity memory systems and modules
#15 | 2023-12-21Memory System Topologies Including A Memory Die Stack
#16 | 2023-11-23DRAM retention test method for dynamic error correction
#17 | 2023-09-28HIGH PERFORMANCE, NON-VOLATILE MEMORY MODULE
#18 | 2023-09-14METHOD AND SYSTEM FOR DYNAMICALLY GENERATING DIFFERENT USER ENVIRONMENTS WITH SECONDARY DEVICES WITH DISPLAYS OF VARIOUS FORM FACTORS
#19 | 2023-08-03High performance persistent memory
#20 | 2023-05-11Adaptive sleep system using data analytics and learning techniques to improve individual sleep conditions
#21 | 2023-03-16SLEEP PHASE DEPENDENT TEMPERATURE CONTROL AND LEARNING METHODS TO OPTIMIZE SLEEP QUALITY
#22 | 2023-03-09Data transmission using delayed timing signals
#23 | 2023-02-02SLEEP PHASE DEPENDENT PRESSURE CONTROL AND LEARNING METHODS TO OPTIMIZE SLEEP QUALITY
#24 | 2023-01-26Memory repair method and apparatus based on error code tracking
#25 | 2022-11-03Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules
#26 | 2022-10-20Memory system topologies including a memory die stack
#27 | 2022-07-14Memory system with threaded transaction support
#28 | 2022-05-05Sleep platform pneumatics management system
#29 | 2022-03-10SLEEPER DETECTION AND CONFIGURATION OF SLEEP ENVIRONMENTS AND LEARNING METHODS TO OPTIMIZE SLEEP QUALITY
#30 | 2022-02-24METHOD AND SYSTEM FOR DYNAMICALLY GENERATING DIFFERENT USER ENVIRONMENTS WITH SECONDARY DEVICES WITH DISPLAYS OF VARIOUS FORM FACTORS
#31 | 2022-02-10High-performance, high-capacity memory systems and modules
#32 | 2021-12-02Memory system topologies including a memory die stack
#33 | 2021-11-04High performance persistent memory
#34 | 2021-10-28DRAM retention test method for dynamic error correction
#35 | 2021-06-10Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules
#36 | 2021-06-10SLEEP CONTROL AND MANAGEMENT ACROSS MULTIPLE PLATFORM SLEEP AND BED ENVIRONMENTS
#37 | 2020-12-10Data transmission using delayed timing signals
#38 | 2020-11-26Memory repair method and apparatus based on error code tracking
#39 | 2020-10-08Adaptive sleep system using data analytics and learning techniques to improve individual sleep conditions based on a therapy profile
#40 | 2020-08-20Memory system with threaded transaction support
#41 | 2020-07-23Memory system topologies including a memory die stack
#42 | 2020-06-18Memory system topologies including a buffer device and an integrated circuit memory device
#43 | 2020-06-11METHOD AND SYSTEM FOR DYNAMICALLY GENERATING DIFFERENT USER ENVIRONMENTS WITH SECONDARY DEVICES WITH DISPLAYS OF VARIOUS FORM FACTORS
#44 | 2020-05-28DRAM retention test method for dynamic error correction
#45 | 2019-11-07Sleeper detection and configuration of sleep environments and learning methods to optimize sleep quality
#46 | 2019-11-07Sleep phase dependent pressure control and learning methods to optimize sleep quality
#47 | 2019-11-07Sleep phase dependent temperature control and learning methods to optimize sleep quality
#48 | 2019-08-29Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules
#49 | 2019-08-22Memory system topologies including a buffer device and an integrated circuit memory device
#50 | 2019-07-04High performance persistent memory
#51 | 2019-04-18High performance, non-volatile memory module
#52 | 2018-05-24Data transmission using delayed timing signals
#53 | 2018-05-24Memory repair method and apparatus based on error code tracking
#54 | 2018-05-17Memory system topologies including a buffer device and an integrated circuit memory device
#55 | 2018-05-10Adaptive sleep system using data analytics and learning techniques to improve individual sleep conditions
#56 | 2017-12-07Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules
#57 | 2017-11-30Memory system with threaded transaction support
#58 | 2017-11-23DRAM retention test method for dynamic error correction
#59 | 2017-11-23High Performance, High Capacity Memory Systems and Modules
#60 | 2017-06-29Memory system topologies including a buffer device and an integrated circuit memory device
#61 | 2017-02-23Memory repair method and apparatus based on error code tracking
#62 | 2016-11-24High performance persistent memory
#63 | 2016-08-09DRAM retention monitoring method for dynamic error correction
#64 | 2016-06-30Memory system topologies including a buffer device and an integrated circuit memory device
#65 | 2016-06-16Techniques for interconnecting stacked dies using connection sites
#66 | 2015-10-15METHOD AND SYSTEM FOR DYNAMICALLY GENERATING DIFFERENT USER ENVIRONMENTS WITH SECONDARY DEVICES WITH DISPLAYS OF VARIOUS FORM FACTORS
#67 | 2015-01-29Methods and circuits for dynamically scaling DRAM power and performance
#68 | 2014-11-27Memory repair method and apparatus based on error code tracking
#69 | 2014-10-02Memory with refresh logic to accommodate low-retention storage rows
#70 | 2014-10-02Data transmission using delayed timing signals
#71 | 2014-09-25DRAM retention test method for dynamic error correction
#72 | 2014-08-07Memory system topologies including a buffer device and an integrated circuit memory device
#73 | 2014-02-20Portable universal personal storage, entertainment, and communication device
#74 | 2013-11-26Portable universal personal storage, entertainment, and communication device
#75 | 2013-02-07Frequency-agile strobe window generation
#76 | 2013-02-07Techniques for interconnecting stacked dies using connection sites
#77 | 2012-12-27Methods and circuits for dynamically scaling DRAM power and performance
#78 | 2012-08-30Bit-replacement technique for DRAM error correction
#79 | 2012-07-19Methods and Systems for Enhancing Wireless Coverage
#80 | 2011-11-10Methods and circuits for detecting and reporting high-energy particles using mobile phones and other portable computing devices
#81 | 2011-09-22Memory system topologies including a buffer device and an integrated circuit memory device
#82 | 2010-06-10Memory system topologies including a buffer device and an integrated circuit memory device
#83 | 2010-03-11EXPANDABLE SYSTEM ARCHITECTURE COMPRISING A HANDHELD COMPUTER DEVICE THAT DYNAMICALLY GENERATES DIFFERENT USER ENVIRONMENTS WITH SECONDARY DEVICES WITH DISPLAYS OF VARIOUS FORM FACTORS
#84 | 2010-03-11DISPLAY DEVICE FOR INTERFACING WITH A HANDHELD COMPUTER DEVICE THAT DYNAMICALLY GENERATES A DIFFERENT USER ENVIRONMENT FOR THE DISPLAY DEVICE
#85 | 2010-03-11METHOD AND SYSTEM FOR DYNAMICALLY GENERATING DIFFERENT USER ENVIRONMENTS WITH SECONDARY DEVICES WITH DISPLAYS OF VARIOUS FORM FACTORS
#86 | 2009-12-31Method and apparatus for test and characterization of semiconductor components
#87 | 2009-12-24System Having A Controller Device, A Buffer Device And A Plurality Of Memory Devices
#88 | 2009-09-22Method and apparatus for test and characterization of semiconductor components
#89 | 2009-08-06User interface of a small touch sensitive display for an electronic data and communication device
#90 | 2009-08-06Memory system topologies including a buffer device and an integrated circuit memory device
#91 | 2009-08-06Situationally aware and self-configuring electronic data and communication device
#92 | 2008-12-11Clock distribution network supporting low-power mode
#93 | 2008-11-18Apparatus and method including a memory device having multiple sets of memory banks with duplicated data emulating a fast access time, fixed latency memory device
#94 | 2008-06-19Memory Module Including A Plurality Of Integrated Circuit Memory Devices And A Plurality Of Buffer Devices In A Matrix Topology
#95 | 2008-05-08System having a controller device, a buffer device and a plurality of memory devices
#96 | 2008-04-22Configurable width buffered module
#97 | 2008-04-08Configurable width buffered module having a bypass circuit
#98 | 2008-04-03Memory system topologies including a buffer device and an integrated circuit memory device
#99 | 2008-02-07Buffered memory having a control bus and dedicated data lines
#100 | 2007-06-28Clock distribution network supporting low-power mode
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