Inventor profile of:

Peter Gillingham

City:

Kanata

Country:

Canada

Published Applications:

26

Last publication date:

2014-11-20

Top Assignees for applications by Peter Gillingham

The entities that hold a legal rights for patent applications filed by inventor Gillingham Peter:

Recent patent applications by Gillingham Peter

Peter Gillingham from Kanata, CA has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2014-11-20
US20140341328A1
Electricity

Clock reproducing and timing method in a system having a plurality of devices

#2 | 2014-04-17
US20140104954A1
Physics

Non-volatile semiconductor memory having multiple external power supplies

#3 | 2013-02-07
US20130033941A1
Physics

Non-volatile semiconductor memory having multiple external power supplies

#4 | 2012-05-31
US20120137030A1
Physics

Reduced pin count interface

#5 | 2012-05-24
US20120126849A1
Electricity

Termination circuit for on-die termination

#6 | 2011-08-25
US20110208906A1
Physics

Semiconductor memory device with plural memory die and controller die

#7 | 2011-08-18
US20110199820A1
Physics

Non-volatile semiconductor memory having multiple external power supplies

#8 | 2011-01-20
US20110016282A1
Physics

Synchronous memory read data capture

#9 | 2010-11-25
US20100296256A1
Physics

Configurable module and memory subsystem

#10 | 2010-08-12
US20100201397A1
Electricity

Termination circuit for on-die termination

#11 | 2010-06-24
US20100162053A1
Physics

Error detection method and a system including one or more memory devices

#12 | 2010-05-06
US20100110794A1
Physics

Non-volatile semiconductor memory having multiple external power supplies

#13 | 2009-06-18
US20090154629A1
Electricity

Clock reproducing and timing method in a system having a plurality of devices

#14 | 2008-08-21
US20080201496A1
Physics

Reduced pin count interface

#15 | 2008-08-21
US20080198657A1
Physics

Non-volatile semiconductor memory having multiple external power supplies

#16 | 2008-05-22
US20080120458A1
Physics

High bandwidth memory interface

#17 | 2008-05-22
US20080120457A1
Physics

Apparatuses for synchronous transfer of information

#18 | 2008-03-13
US20080065820A1
Physics

High bandwidth memory interface

#19 | 2008-02-28
US20080049482A1
Physics

Compare circuit for a content addressable memory cell

#20 | 2008-01-03
US20080005518A1
Physics

Synchronous memory read data capture

#21 | 2007-11-08
US20070258277A1
Physics

Matchline sense circuit and method

#22 | 2007-01-18
US20070014139A1
Physics

Compare circuit for a content addressable memory cell

#23 | 2006-04-20
US20060083041A1
Physics

Matchline sense circuit and method

#24 | 2006-01-17
US10258580
-

Matchline sense circuit and method

#25 | 2005-12-15
US20050276086A1
Physics

Ternary CAM cell for reduced matchline capacitance

#26 | 2005-04-14
US20050081012A1
Physics

High bandwidth memory interface

InventorID:

76848 ⎘