Kanata, Ontario
Canada
42
2011-03-10
42
2013-05-14
These are the the leading inventors for applications assigned to MOSAID Technologies Incorporated:
MOSAID Technologies Incorporated based in Kanata, Ontario, CA has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Methods and systems for failure isolation and data recovery in a configuration of series-connected semiconductor devices
#2 | 2010-08-12 ✅ Patent 8,063,658 granted on 2011-11-22Termination circuit for on-die termination
#3 | 2009-05-21 ✅ Patent 7,836,340 granted on 2010-11-16Methods and systems for failure isolation and data recovery in a configuration of series-connected semiconductor devices
#4 | 2008-10-02 ✅ Patent 7,551,012 granted on 2009-06-23Phase shifting in DLL/PLL
#5 | 2008-09-18 ✅ Patent 7,865,756 granted on 2011-01-04Methods and apparatus for clock signal synchronization in a configuration of series-connected semiconductor devices
#6 | 2008-08-28 ✅ Patent 7,577,059 granted on 2009-08-18Decoding control with address transition detection in page erase function
#7 | 2008-08-14 ✅ Patent 7,705,642 granted on 2010-04-27Simplified bias circuitry for differential buffer stage with symmetric loads
#8 | 2008-07-31 ✅ Patent 7,459,949 granted on 2008-12-02Phase detector circuit and method therefor
#9 | 2008-06-12 ✅ Patent 7,529,149 granted on 2009-05-05Memory system and method with serial and parallel modes
#10 | 2008-06-05 ✅ Patent 7,508,724 granted on 2009-03-24Circuit and method for testing multi-device systems
#11 | 2008-06-05 ✅ Patent 7,511,996 granted on 2009-03-31Flash memory program inhibit scheme
#12 | 2008-04-01 ✅ Patent 7,353,330 granted on 2008-04-01Method and apparatus for performing repeated content addressable memory searches
#13 | 2008-03-25 ✅ Patent 7,349,513 granted on 2008-03-25Process, voltage, temperature independent switched delay compensation scheme
#14 | 2008-03-06 ✅ Patent 7,492,658 granted on 2009-02-17Apparatus and method for self-refreshing dynamic random access memory cells
#15 | 2008-02-28 ✅ Patent 7,561,454 granted on 2009-07-14Compare circuit for a content addressable memory cell
#16 | 2007-12-13 ✅ Patent 7,499,361 granted on 2009-03-03Dynamic random access memory device and method for self-refreshing memory cells with temperature compensated self-refresh
#17 | 2007-12-13 ✅ Patent 7,505,336 granted on 2009-03-17Method and apparatus for synchronization of row and column access operations
#18 | 2007-11-08 ✅ Patent 7,382,638 granted on 2008-06-03Matchline sense circuit and method
#19 | 2007-11-01 ✅ Patent 7,286,377 granted on 2007-10-23Dynamic random access memory device and method for self-refreshing memory cells with temperature compensated self-refresh
#20 | 2007-11-01 ✅ Patent 7,492,656 granted on 2009-02-17Dynamic random access memory with fully independent partial array refresh function
#21 | 2007-09-11 ✅ Patent 7,269,075 granted on 2007-09-11Method and apparatus for simultaneous differential data sensing and capture in a high speed memory
#22 | 2007-09-06 ✅ Patent 7,511,980 granted on 2009-03-31Low power match-line sensing circuit
#23 | 2007-09-04 ✅ Patent 7,266,747 granted on 2007-09-04Error correction scheme for memory
#24 | 2007-08-28 ✅ Patent 7,263,117 granted on 2007-08-28Dual control analog delay element and related delay method
#25 | 2007-08-09 ✅ Patent 7,509,469 granted on 2009-03-24Semiconductor memory asynchronous pipeline
#26 | 2007-08-09 ✅ Patent 7,312,636 granted on 2007-12-25Voltage level shifter circuit
#27 | 2007-07-26 ✅ Patent 7,362,640 granted on 2008-04-22Apparatus and method for self-refreshing dynamic random access memory cells
#28 | 2007-07-05 ✅ Patent 7,761,831 granted on 2010-07-20ASIC design using clock and power grid standard cell
#29 | 2007-07-05 ✅ Patent 7,515,471 granted on 2009-04-07Memory with output control
#30 | 2007-06-21 ✅ Patent 7,747,833 granted on 2010-06-29Independent link and bank selection
#31 | 2007-06-14 ✅ Patent 7,334,093 granted on 2008-02-19Block programmable priority encoder in a CAM
#32 | 2007-05-31 ✅ Patent 7,385,858 granted on 2008-06-10Semiconductor integrated circuit having low power consumption with self-refresh
#33 | 2007-05-03 ✅ Patent 7,369,451 granted on 2008-05-06Dynamic random access memory device and method for self-refreshing memory cells
#34 | 2007-03-22 ✅ Patent 7,391,247 granted on 2008-06-24Timing vernier using a delay locked loop
#35 | 2007-02-08 ✅ Patent 7,248,531 granted on 2007-07-24Voltage down converter for high speed memory
#36 | 2007-01-18 ✅ Patent 7,304,876 granted on 2007-12-04Compare circuit for a content addressable memory cell
#37 | 2007-01-11 ✅ Patent 7,478,193 granted on 2009-01-13Method and apparatus for interconnecting content addressable memory devices
#38 | 2006-11-16 ✅ Patent 7,298,637 granted on 2007-11-20Multiple match detection circuit and method
#39 | 2006-07-06 ✅ Patent 7,450,444 granted on 2008-11-11High speed DRAM architecture with uniform access latency
#40 | 2006-05-18 ✅ Patent 7,227,766 granted on 2007-06-05Mismatch-dependent power allocation technique for match-line sensing in content-addressable memories
#41 | 2006-04-20 ✅ Patent 7,277,334 granted on 2007-10-02Method and apparatus for synchronization of row and column access operations
#42 | 2005-11-03 ✅ Patent 7,318,123 granted on 2008-01-08Method and apparatus for accelerating retrieval of data from a memory system with cache by reducing latency
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