KANATA
Canada
65
2015-02-12
The entities that hold a legal rights for patent applications filed by inventor OH HAKJUNE:
HAKJUNE OH from KANATA, CA has applied for patents for these inventions. The list has both pending applications and granted patents:
System and method of page buffer operation for memory devices
#2 | 2014-07-10SCALABLE MEMORY SYSTEM
#3 | 2014-06-19PACKET DATA ID GENERATION FOR SERIALLY INTERCONNECTED DEVICES
#4 | 2013-07-04Scalable memory system
#5 | 2013-03-14Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
#6 | 2013-01-10Non-volatile semiconductor memory device with power-saving feature
#7 | 2013-01-03Independent link and bank selection
#8 | 2012-06-21Non-volatile semiconductor memory device with power saving feature
#9 | 2012-03-15System and method of page buffer operation for memory devices
#10 | 2011-12-22Apparatus and method for using a page buffer of a memory device as a temporary cache
#11 | 2011-09-29Memory system having a plurality of serially connected devices
#12 | 2011-07-21Independent link and bank selection
#13 | 2011-06-02MODULAR COMMAND STRUCTURE FOR MEMORY AND MEMORY SYSTEM
#14 | 2011-04-14APPARATUS AND METHOD FOR PRODUCING IDS FOR INTERCONNECTED DEVICES OF MIXED TYPE
#15 | 2011-03-10Methods and apparatus for clock signal synchronization in a configuration of series connected semiconductor devices
#16 | 2010-10-21Apparatus and method for communicating with semiconductor devices of a serial interconnection
#17 | 2010-08-12Memory with data control
#18 | 2010-08-05Independent link and bank selection
#19 | 2010-04-15Bridge device architecture for connecting discrete memory devices to a system
#20 | 2010-04-01Serial-connected memory system with duty cycle correction
#21 | 2010-04-01Serial-connected memory system with output delay adjustment
#22 | 2010-03-18Mass data storage system with non-volatile memory modules
#23 | 2010-01-14Mixed data rates in memory devices and systems
#24 | 2009-12-10Dynamic random access memory device and method for self-refreshing memory cells
#25 | 2009-10-15Non-volatile semiconductor memory device with power saving feature
#26 | 2009-07-23Memory system and method with serial and parallel modes
#27 | 2009-06-25Non-volatile semiconductor memory device with power saving feature
#28 | 2009-06-18Semiconductor memory device suitable for interconnection in a ring topology
#29 | 2009-04-23Apparatus and method for self-refreshing dynamic random access memory cells
#30 | 2009-04-23Dynamic random access memory with fully independent partial array refresh function
#31 | 2009-03-19Memory with output control
#32 | 2009-03-05Daisy-chain memory configuration and usage
#33 | 2009-01-22Storage of data in memory via packet strobing
#34 | 2008-09-18Methods and apparatus for clock signal synchronization in a configuration of series-connected semiconductor devices
#35 | 2008-08-28Apparatus and method of page program operation for memory devices with mirror back-up of data
#36 | 2008-08-28System and method of page buffer operation for memory devices
#37 | 2008-08-28Apparatus and method for using a page buffer of a memory device as a temporary cache
#38 | 2008-08-21SEMICONDUCTOR DEVICE AND METHOD FOR REDUCING POWER CONSUMPTION IN A SYSTEM HAVING INTERCONNECTED DEVICES
#39 | 2008-08-21System having one or more memory devices
#40 | 2008-08-14Apparatus and method for producing identifiers regardless of mixed device type in a serial interconnection
#41 | 2008-07-31Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
#42 | 2008-07-10Apparatus and method for communicating with semiconductor devices of a serial interconnection
#43 | 2008-06-26ID generation apparatus and method for serially interconnected devices
#44 | 2008-06-26Apparatus and method for producing IDS for interconnected devices of mixed type
#45 | 2008-06-19Dynamic random access memory device and method for self-refreshing memory cells
#46 | 2008-06-12Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
#47 | 2008-06-12System and method of operating memory devices of mixed type
#48 | 2008-06-12Address assignment and type recognition of serially interconnected memory devices of mixed type
#49 | 2008-06-12Apparatus and method for capturing serial input data
#50 | 2008-06-12Memory system and method with serial and parallel modes
#51 | 2008-05-08Semiconductor integrated circuit having current leakage reduction scheme
#52 | 2008-04-03Packet based ID generation for serially interconnected devices
#53 | 2008-03-06Apparatus and method for self-refreshing dynamic random access memory cells
#54 | 2008-02-28Modular command structure for memory and memory system
#55 | 2008-02-28Scalable memory system
#56 | 2008-01-03METHOD OF CONFIGURING NON-VOLATILE MEMORY FOR A HYBRID DISK DRIVE
#57 | 2007-11-01Dynamic random access memory with fully independent partial array refresh function
#58 | 2007-10-04Apparatus and method for establishing device identifiers for serially interconnected devices
#59 | 2007-07-26Apparatus and method for self-refreshing dynamic random access memory cells
#60 | 2007-07-05Memory with output control
#61 | 2007-06-21Independent link and bank selection
#62 | 2007-05-31Semiconductor integrated circuit having low power consumption with self-refresh
#63 | 2007-05-17Daisy chain cascading devices
#64 | 2007-05-03Dynamic random access memory device and method for self-refreshing memory cells
#65 | 2007-04-05Semiconductor integrated circuit having current leakage reduction scheme
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