Santa Clara, California
United States
97
2007-06-21
85
2009-11-10
These are the the leading inventors for applications assigned to Matrix Semiconductor, Inc.:
Matrix Semiconductor, Inc. based in Santa Clara, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Laser anneal of vertically oriented semiconductor structures while maintaining a dopant profile
#2 | 2007-06-14 ✅ Patent 7,291,562 granted on 2007-11-06Method to form topography in a deposited layer above a substrate
#3 | 2007-05-24 ✅ Patent 7,816,659 granted on 2010-10-19Devices having reversible resistivity-switching metal oxide or nitride layer with added metal
#4 | 2007-05-10Vertical diode doped with antimony to avoid or limit dopant diffusion
#5 | 2007-04-26 ✅ Patent 7,800,932 granted on 2010-09-21Memory cell comprising switchable semiconductor memory element with trimmable resistance
#6 | 2007-03-29 ✅ Patent 7,494,765 granted on 2009-02-24Method for patterning photoresist pillars using a photomask having a plurality of chromeless nonprinting phase shifting windows
#7 | 2007-03-29Memory with high dielectric constant antifuses and method for using at low voltage
#8 | 2007-01-11Method of plasma etching transition metals and their compounds
#9 | 2007-01-11 ✅ Patent 7,426,128 granted on 2008-09-16Switchable resistive memory with opposite polarity write pulses
#10 | 2007-01-11Memory cell comprising a thin film three-terminal switching device having a metal source and /or drain region
#11 | 2006-12-28 ✅ Patent 7,678,420 granted on 2010-03-16Method of depositing germanium films
#12 | 2006-12-07 ✅ Patent 8,110,863 granted on 2012-02-07TFT charge storage memory cell having high-mobility corrugated channel
#13 | 2006-12-07Rewriteable memory cell comprising a transistor and resistance-switching material in series
#14 | 2006-11-09Rewriteable memory cell comprising a diode and a resistance-switching material
#15 | 2006-11-09High-density nonvolatile memory array fabricated at low temperature comprising semiconductor diodes
#16 | 2006-10-05 ✅ Patent 7,553,611 granted on 2009-06-30Masking of repeated overlay and alignment marks to allow reuse of photomasks in a vertical structure
#17 | 2006-09-28 ✅ Patent 7,422,985 granted on 2008-09-09Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
#18 | 2006-09-28 ✅ Patent 7,521,353 granted on 2009-04-21Method for reducing dielectric overetch when making contact to conductive features
#19 | 2006-09-14 ✅ Patent 7,303,959 granted on 2007-12-04Bottom-gate SONOS-type cell having a silicide gate
#20 | 2006-08-17 ✅ Patent 7,517,796 granted on 2009-04-14Method for patterning submicron pillars
#21 | 2006-07-20 ✅ Patent 7,259,038 granted on 2007-08-21Forming nonvolatile phase change memory cell having a reduced thermal contact area
#22 | 2006-07-20 ✅ Patent 7,465,951 granted on 2008-12-16Write-once nonvolatile phase change memory array
#23 | 2006-07-20 ✅ Patent 7,307,268 granted on 2007-12-11Structure and method for biasing phase change memory array for reliable writing
#24 | 2006-06-15 ✅ Patent 7,300,876 granted on 2007-11-27Method for cleaning slurry particles from a surface polished by chemical mechanical polishing
#25 | 2006-06-13 ✅ Patent 7,062,602 granted on 2006-06-13Method for reading data in a write-once memory device using a write-many file system
#26 | 2006-05-30 ✅ Patent 7,054,219 granted on 2006-05-30Transistor layout configuration for tight-pitched memory array lines
#27 | 2006-05-23 ✅ Patent 7,051,251 granted on 2006-05-23Method for storing data in a write-once memory array using a write-many file system
#28 | 2006-04-27 ✅ Patent 7,405,465 granted on 2008-07-29Deposited semiconductor structure to minimize n-type dopant diffusion and method of making
#29 | 2006-04-20 ✅ Patent 7,149,119 granted on 2006-12-12System and method of controlling a three-dimensional memory
#30 | 2006-04-06 ✅ Patent 7,566,974 granted on 2009-07-28Doped polysilicon via connecting polysilicon layers
#31 | 2006-04-04 ✅ Patent 7,023,260 granted on 2006-04-04Charge pump circuit incorporating corresponding parallel charge pump stages and method therefor
#32 | 2006-03-30Fuse memory cell comprising a diode, the diode serving as the fuse element
#33 | 2006-03-28 ✅ Patent 7,018,878 granted on 2006-03-28Metal structures for integrated circuits and methods for making the same
#34 | 2006-03-16 ✅ Patent 7,238,607 granted on 2007-07-03Method to minimize formation of recess at surface planarized by chemical mechanical planarization
#35 | 2006-03-09 ✅ Patent 7,432,141 granted on 2008-10-07Large-grain p-doped polysilicon films for use in thin film transistors
#36 | 2006-02-28 ✅ Patent 7,005,730 granted on 2006-02-28Memory module having interconnected and stacked integrated circuits
#37 | 2006-02-28 ✅ Patent 7,005,350 granted on 2006-02-28Method for fabricating programmable memory array structures incorporating series-connected transistor strings
#38 | 2006-02-21 ✅ Patent 7,003,619 granted on 2006-02-21Memory device and method for storing and reading a file system structure in a write-once memory array
#39 | 2006-02-16Low-density, high-resistivity titanium nitride layer for use as a contact for low-leakage dielectric layers and method of making
#40 | 2006-02-14 ✅ Patent 7,000,063 granted on 2006-02-14Write-many memory device and method for limiting a number of writes to the write-many memory device
#41 | 2006-02-07 ✅ Patent 6,996,660 granted on 2006-02-07Memory device and method for storing and reading data in a write-once memory array
#42 | 2006-02-02 ✅ Patent 7,276,403 granted on 2007-10-02Selective oxidation of silicon in diode, TFT, and monolithic three dimensional memory arrays
#43 | 2006-01-31 ✅ Patent 6,992,349 granted on 2006-01-31Rail stack array of charge storage devices and method of making same
#44 | 2006-01-12 ✅ Patent 7,265,049 granted on 2007-09-04Ultrathin chemically grown oxide film as a dopant diffusion barrier in semiconductor devices
#45 | 2006-01-05 ✅ Patent 7,307,013 granted on 2007-12-11Nonselective unpatterned etchback to expose buried patterned features
#46 | 2005-11-15 ✅ Patent 6,965,527 granted on 2005-11-15Multibank memory on a die
#47 | 2005-11-01 ✅ Patent 6,960,794 granted on 2005-11-01Formation of thin channels for TFT devices to ensure low variability of threshold voltages
#48 | 2005-10-18 ✅ Patent 6,956,278 granted on 2005-10-18Low-density, high-resistivity titanium nitride layer for use as a contact for low-leakage dielectric layers
#49 | 2005-10-13Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
#50 | 2005-10-11 ✅ Patent 6,954,394 granted on 2005-10-11Integrated circuit and method for selecting a set of memory-cell-layer-dependent or temperature-dependent operating conditions
#51 | 2005-10-06Photomask features with chromeless nonprinting phase shifting window
#52 | 2005-10-04 ✅ Patent 6,951,780 granted on 2005-10-04Selective oxidation of silicon in diode, TFT, and monolithic three dimensional memory arrays
#53 | 2005-10-04 ✅ Patent 6,952,043 granted on 2005-10-04Electrically isolated pillars in active devices
#54 | 2005-09-20 ✅ Patent 6,947,305 granted on 2005-09-20Method for fabricating and identifying integrated circuits and self-identifying integrated circuits
#55 | 2005-09-06 ✅ Patent 6,940,109 granted on 2005-09-06High density 3d rail stack arrays and method of making
#56 | 2005-08-30 ✅ Patent 6,937,495 granted on 2005-08-30Current sensing method and apparatus particularly useful for a memory array of cells having diode-like characteristics
#57 | 2005-08-18 ✅ Patent 7,106,652 granted on 2006-09-12Word line arrangement having multi-layer word line segments for three-dimensional memory array
#58 | 2005-08-18 ✅ Patent 7,177,169 granted on 2007-02-13Word line arrangement having multi-layer word line segments for three-dimensional memory array
#59 | 2005-08-18 ✅ Patent 7,002,825 granted on 2006-02-21Word line arrangement having segmented word lines
#60 | 2005-08-09 ✅ Patent 6,928,590 granted on 2005-08-09Memory device and method for storing bits in non-adjacent storage locations in a memory array
#61 | 2005-08-02 ✅ Patent 6,925,545 granted on 2005-08-02Configuring file structures and file system structures in a memory device
#62 | 2005-07-21Non-volatile memory cell comprising a dielectric layer and a phase change material in series
#63 | 2005-06-16 ✅ Patent 7,474,000 granted on 2009-01-06High density contact to relaxed geometry layers
#64 | 2005-06-09 ✅ Patent 7,172,840 granted on 2007-02-06Photomask features with interior nonprinting window using alternating phase shifting
#65 | 2005-06-09 ✅ Patent 7,023,739 granted on 2006-04-04NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
#66 | 2005-06-09 ✅ Patent 7,423,304 granted on 2008-09-09Optimization of critical dimensions and pitch of patterned features in and above a substrate
#67 | 2005-06-09 ✅ Patent 7,176,064 granted on 2007-02-13Memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
#68 | 2005-06-09 ✅ Patent 6,946,719 granted on 2005-09-20Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide
#69 | 2005-05-31 ✅ Patent 6,901,549 granted on 2005-05-31Method for altering a word stored in a write-once memory device
#70 | 2005-05-24 ✅ Patent 6,897,514 granted on 2005-05-24Two mask floating gate EEPROM and method of making
#71 | 2005-05-17 ✅ Patent 6,894,936 granted on 2005-05-17Memory device and method for selectable sub-array activation
#72 | 2005-05-17 ✅ Patent 6,895,490 granted on 2005-05-17Method for making a write-once memory device read compatible with a write-many file system
#73 | 2005-05-12 ✅ Patent 7,022,572 granted on 2006-04-04Manufacturing method for integrated circuit having disturb-free programming of passive element memory cells
#74 | 2005-05-12 ✅ Patent 7,285,464 granted on 2007-10-23Nonvolatile memory cell comprising a reduced height vertical diode
#75 | 2005-05-03 ✅ Patent 6,889,307 granted on 2005-05-03Integrated circuit incorporating dual organization memory array
#76 | 2005-05-03 ✅ Patent 6,888,750 granted on 2005-05-03Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication
#77 | 2005-04-19 ✅ Patent 6,881,994 granted on 2005-04-19Monolithic three dimensional array of charge storage devices containing a planarized surface
#78 | 2005-04-12 ✅ Patent 6,879,505 granted on 2005-04-12Word line arrangement having multi-layer word line segments for three-dimensional memory array
#79 | 2005-04-07 ✅ Patent 6,963,504 granted on 2005-11-08Apparatus and method for disturb-free programming of passive element memory cells
#80 | 2005-04-05 ✅ Patent 6,875,641 granted on 2005-04-05Three-dimensional memory
#81 | 2005-03-15 ✅ Patent 6,868,022 granted on 2005-03-15Redundant memory structure using bad bit pointers
#82 | 2005-03-15 ✅ Patent 6,867,992 granted on 2005-03-15Modular memory device
#83 | 2005-03-10 ✅ Patent 8,637,366 granted on 2014-01-28Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states
#84 | 2005-02-24 ✅ Patent 6,996,017 granted on 2006-02-07Redundant memory structure using bad bit pointers
#85 | 2005-02-22 ✅ Patent 6,859,410 granted on 2005-02-22Tree decoder structure particularly well-suited to interfacing array lines having extremely small layout pitch
#86 | 2005-02-22 ✅ Patent 6,858,899 granted on 2005-02-22Thin film transistor with metal oxide layer and method of making same
#87 | 2005-02-15 ✅ Patent 6,856,572 granted on 2005-02-15Multi-headed decoder structure utilizing memory array line driver with dual purpose driver device
#88 | 2005-02-08 ✅ Patent 6,853,049 granted on 2005-02-08Silicide-silicon oxide-semiconductor antifuse device and method of making
#89 | 2005-02-01 ✅ Patent 6,849,905 granted on 2005-02-01Semiconductor device with localized charge storage dielectric and method of making same
#90 | 2005-01-20 ✅ Patent 6,984,561 granted on 2006-01-10Method for making high density nonvolatile memory
#91 | 2005-01-20 ✅ Patent 6,960,495 granted on 2005-11-01Method for making contacts in a high-density memory
#92 | 2005-01-20 ✅ Patent 7,009,275 granted on 2006-03-07Method for making high density nonvolatile memory
#93 | 2005-01-20 ✅ Patent 6,995,422 granted on 2006-02-07High-density three-dimensional memory
#94 | 2005-01-20 ✅ Patent 6,952,030 granted on 2005-10-04High-density three-dimensional memory cell
#95 | 2005-01-18 ✅ Patent 6,843,421 granted on 2005-01-18Molded memory module and method of making the module absent a substrate support
#96 | 2005-01-11 ✅ Patent 6,841,813 granted on 2005-01-11TFT mask ROM and method for making same
#97 | 2005-01-04 ✅ Patent 6,839,262 granted on 2005-01-04Multiple-mode memory and method for forming same
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