Mountain View, California
United States
36
2025-02-27
The entities that hold a legal rights for patent applications filed by inventor Petti Christopher:
Christopher Petti from Mountain View, US has applied for patents for these inventions. The list has both pending applications and granted patents:
BONDED MEMORY MRAM ARRAYS SHARING A COMMON DRIVER CIRCUIT AND METHODS OF MAKING THE SAME
#2 | 2020-11-26Three-dimensional NAND memory device containing two terminal selector and methods of using and making thereof
#3 | 2020-07-28Three-dimensional NAND memory device containing two terminal selector and methods of using and making thereof
#4 | 2019-10-17Three-dimensional memory device including germanium-containing vertical channels and method of making the same
#5 | 2019-09-19Three-dimensional phase change memory device having a laterally constricted element and method of making the same
#6 | 2019-07-18Data rewrite during refresh window
#7 | 2019-04-25Barrier modulated cell structures with intrinsic vertical bit line architecture
#8 | 2019-01-24Magnetoelectric random access memory array and methods of operating the same
#9 | 2018-07-12Multi-gate vertical field effect transistor with channel strips laterally confined by gate dielectric layers, and method of making thereof
#10 | 2018-06-28Three-dimensional memory devices containing inter-tier dummy memory cells and methods of making the same
#11 | 2018-06-07Randomly writable memory device and method of operating thereof
#12 | 2018-04-10Three-dimensional ferroelectric memory device and method of making thereof
#13 | 2017-12-05Selecting reversible resistance memory cells based on initial resistance switching
#14 | 2017-10-26Implementation of VMCO area switching cell to VBL architecture
#15 | 2017-08-17Wordline sidewall recess for integrating planar selector device
#16 | 2017-08-17Implementation of VMCO area switching cell to VBL architecture
#17 | 2016-11-22Multi tier three-dimensional memory devices including vertically shared bit lines
#18 | 2016-10-25Three dimensional memory device containing aluminum source contact via structure and method of making thereof
#19 | 2016-08-18Vertical transistor and local interconnect structure
#20 | 2016-05-12High endurance non-volatile storage
#21 | 2016-01-21Side wall bit line structures
#22 | 2016-01-21Memory hole bit line structures
#23 | 2016-01-21Controlling adjustable resistance bit lines connected to word line combs
#24 | 2016-01-21OPERATION MODES FOR ADJUSTABLE RESISTANCE BIT LINE STRUCTURES
#25 | 2016-01-21REDUCING DISTURB WITH ADJUSTABLE RESISTANCE BIT LINE STRUCTURES
#26 | 2016-01-21Setting channel voltages of adjustable resistance bit line structures using dummy word lines
#27 | 2014-09-25Vertical NAND and method of making thereof using sequential stack etching and landing pad
#28 | 2013-07-11Method of fabricating a self-aligning damascene memory structure
#29 | 2010-02-25Method of fabricating a self-aligning damascene memory structure
#30 | 2009-03-17Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
#31 | 2008-10-16Method of fabricating a self-aligning damascene memory structure
#32 | 2006-11-09TFT mask ROM and method for making same
#33 | 2006-10-31Dense arrays and charge storage devices
#34 | 2006-02-28Method for fabricating programmable memory array structures incorporating series-connected transistor strings
#35 | 2005-03-31TFT mask ROM and method for making same
#36 | 2005-01-11TFT mask ROM and method for making same
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