209388 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto; Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
Sub-classes:Method of manufacturing semiconductor device having hybrid bonding interface
#2Semiconductor device having hybrid bonding interface, method of manufacturing the semiconductor device, and method of manufacturing semiconductor device assembly
#3Methods for forming interconnect assemblies with probed bond pads
#4Bond rings in semiconductor devices and methods of forming same
#5Methods of forming a microelectronic device structure, and related microelectronic device structures and microelectronic devices
#6Bond rings in semiconductor devices and methods of forming same
#7Methods for forming interconnect assemblies with probed bond pads
#8Methods of forming a microelectronic device structure, and related microelectronic device structures and microelectronic devices
#9SEMICONDUCTOR DEVICE
#10Semiconductor device
#11Interconnect assemblies with probed bond pads
#12Semiconductor structure having offset passivation to reduce electromigration
#13Electroplated posts with reduced topography and stress
#14Semiconductor package with passivation island for reducing stress on solder bumps
#15Semiconductor package with passivation island for reducing stress on solder bumps
#16Flip chip for electrical function test and manufacturing method thereof