ClassID:

209399

H01L2224/02245 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto; Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body not in direct contact with the bonding area Flow barrier

Recent Application in this class:
#1
20250006692
2025-01-02

Method for packaging stacking flip chip

#2
20240120277
2024-04-11

CHIP STRUCTURE

#3
20240055376
2024-02-15

Method of soldering a semiconductor chip to a chip carrier

#4
20220230940
2022-07-21

Barrier structures between external electrical connectors

#5
20220068851
2022-03-03

Chip with chip pad and associated solder flux outgassing trench

#6
20210265200
2021-08-26

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

#7
20200168565
2020-05-28

Semiconductor package

#8
20200058589
2020-02-20

Chip structure and method for forming the same

#9
20190333841
2019-10-31

Barrier structures between external electrical connectors

#10
20190319000
2019-10-17

Package structure and manufacturing method thereof

#11
20190273109
2019-09-05

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

#12
20190259633
2019-08-22

Electronic substrate and electronic apparatus

#13
20190244887
2019-08-08

Packaged semiconductor devices and methods of packaging thereof

#14
20180277585
2018-09-27

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

#15
20180197807
2018-07-12

Semiconductor device

#16
20170256477
2017-09-07

Barrier structures between external electrical connectors

#17
20170186681
2017-06-29

Packaging device having plural microstructures disposed proximate to die mounting region

#18
20170141072
2017-05-18

Optimized solder pads for microelectronic components

#19
20160343763
2016-11-24

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

#20
20160343762
2016-11-24

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

#21
20160064348
2016-03-03

Packaging device having plural microstructures disposed proximate to die mounting region

#22
20150270212
2015-09-24

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

#23
20150194400
2015-07-09

Barrier structures between external electrical connectors

#24
20140362267
2014-12-11

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

#25
20140138852
2014-05-22

Semiconductor device and method for producing the same

#26
20130009321
2013-01-10

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

#27
14262417
2015-08-18

Bond pad and passivation layer having a gap and method for forming