H01L2224/0382 - CPC Classification Index

ClassID:

209496 ⎘

H01L2224/0382 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto; Manufacturing methods; Post-treatment of the bonding area Applying permanent coating, e.g. in-situ coating

Sub-classes:

H01L2224/03821 » Spray coating 4
H01L2224/03822 » by dipping, e.g. in a solder bath 1
H01L2224/03823 » Immersion coating, e.g. in a solder bath 9
H01L2224/03824 » Chemical solution deposition [CSD], i.e. using a liquid precursor 0
H01L2224/03825 » Plating, e.g. electroplating, electroless plating 39
H01L2224/03826 » Physical vapour deposition [PVD], e.g. evaporation, or sputtering 32
H01L2224/03827 » Chemical vapour deposition [CVD], e.g. laser CVD 20

Recent Application in this class:

20250300103

2025-09-25

Passivation Structure for Metal Pattern

20250167148

2025-05-22

MANUFACTURING METHOD OF AN ELECTRONIC CIRCUIT COMPRISING CONTACT PADS

20240395742

2024-11-28

METHOD AND APPARATUS FOR IMPROVED WAFER COATING

20240371796

2024-11-07

CHIP PACKAGE AND METHOD OF FORMING A CHIP PACKAGE

20240332227

2024-10-03

SEMICONDUCTOR ELEMENT WITH BONDING LAYER HAVING LOW-K DIELECTRIC MATERIAL

20240145417

2024-05-02

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

20240120301

2024-04-11

INTEGRATED CIRCUIT CHIP INCLUDING A PASSIVATION NITRIDE LAYER IN CONTACT WITH A HIGH VOLTAGE BONDING PAD AND METHOD OF MAKING

20240063154

2024-02-22

Method of forming a sensor device having moisture sensitive dielectric layer with integrally formed projections

20230395532

2023-12-07

Chip package and method of forming a chip package

#10

20230055518

2023-02-23

Solder ball application for singular die

#11

20230052604

2023-02-16

Passivation Structure for Metal Pattern

#12

20230032635

2023-02-02

Integrated circuit chip including a passivation nitride layer in contact with a high voltage bonding pad and method of making

#13

20220384377

2022-12-01

SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME

#14

20220367390

2022-11-17

Method and apparatus for improved wafer coating

#15

20220252534

2022-08-11

Method of forming a sensor device

#16

20220216244

2022-07-07

ON-CHIP INTEGRATION OF INDIUM TIN OXIDE (ITO) LAYERS FOR OHMIC CONTACT TO BOND PADS

#17

20220157749

2022-05-19

Solder ball application for singular die

#18

20210375792

2021-12-02

Chip package and method of forming a chip package

#19

20210091057

2021-03-25

Driving substrate and manufacturing method thereof, and micro LED bonding method

#20

20200365540

2020-11-19

METHOD OF SELF-ASSEMBLY WITH A HYBRID MOLECULAR BONDING

#21

20200126938

2020-04-23

3D packages and methods for forming the same

#22

20200075522

2020-03-05

Fabrication of solder balls with injection molded solder

#23

20190252335

2019-08-15

Bond structures and the methods of forming the same

#24

20190189763

2019-06-20

Semiconductor device

#25

20190096832

2019-03-28

Semiconductor structure having counductive bump with tapered portions and method of manufacturing the same

#26

20190006299

2019-01-03

METHOD TO IMPROVE CMP SCRATCH RESISTANCE FOR NON PLANAR SURFACES

#27

20180366427

2018-12-20

Method of forming an aluminum oxide layer, metal surface with aluminum oxide layer, and electronic device

#28

20180286903

2018-10-04

Packaging method and package structure for image sensing chip

#29

20180261562

2018-09-13

Semiconductor device and method of manufacturing the same

#30

20180166408

2018-06-14

Bond structures and the methods of forming the same

#31

20180097080

2018-04-05

Semiconductor device

#32

20180096962

2018-04-05

SUBSTRATE ATTACHMENT FOR ATTACHING A SUBSTRATE THERETO

#33

20180082965

2018-03-22

MASKLESS SELECTIVE RETENTION OF A CAP UPON A CONDUCTOR FROM A NONCONDUCTIVE CAPPING LAYER

#34

20180076160

2018-03-15

MASKLESS SELECTIVE RETENTION OF A CAP UPON A CONDUCTOR FROM A NONCONDUCTIVE CAPPING LAYER

#35

20170352639

2017-12-07

METHOD FOR PROTECTING BOND PADS FROM CORROSION

#36

20170236793

2017-08-17

Semiconductor device

#37

20170186715

2017-06-29

Bond structures and the methods of forming the same

#38

20170162526

2017-06-08

Method to improve CMP scratch resistance for non planar surfaces

#39

20170141055

2017-05-18

Chip packages and methods of manufacture thereof

#40

20170117241

2017-04-27

MASKLESS SELECTIVE RETENTION OF A CAP UPON A CONDUCTOR FROM A NONCONDUCTIVE CAPPING LAYER

#41

20170033064

2017-02-02

Packaging devices and methods of manufacture thereof

#42

20170025371

2017-01-26

Method of forming a semiconductor device with bump stop structure

#43

20160358881

2016-12-08

Method for bonding substrates

#44

20160254238

2016-09-01

Packaging devices and methods of manufacture thereof

#45

20160218055

2016-07-28

Semiconductor packaging and manufacturing method thereof

#46

20160148891

2016-05-26

Semiconductor structure having a conductive bump with a plurality of bump segments

#47

20160148883

2016-05-26

Bond Pad Having Ruthenium Covering Passivation Sidewall

#48

20160111386

2016-04-21

Bond pad structure for low temperature flip chip bonding

#49

20150348922

2015-12-03

Method of forming a semiconductor component comprising a second passivation layer having a first opening exposing a bond pad and a plurality of second openings exposing a top surface of an underlying first passivation layer

#50

20150279816

2015-10-01

Bonding structure for stacked semiconductor devices

#51

20150262958

2015-09-17

3D packages and methods for forming the same

#52

20150187736

2015-07-02

Semiconductor device and related manufacturing method

#53

20150179606

2015-06-25

Method of processing a semiconductor wafer

#54

20150171026

2015-06-18

Semiconductor apparatus and method for producing the same

#55

20150145130

2015-05-28

Semiconductor packaging and manufacturing method thereof

#56

20150137353

2015-05-21

Under-bump metal structures for interconnecting semiconductor dies or packages and associated systems and methods

#57

20150041995

2015-02-12

Chip package and fabrication method thereof

#58

20140162404

2014-06-12

Method for packaging low-K chip

#59

20140110838

2014-04-24

SEMICONDUCTOR DEVICES AND PROCESSING METHODS

#60

20140054800

2014-02-27

Method for manufacturing a metal pad structure of a die, a method for manufacturing a bond pad of a chip, a die arrangement and a chip arrangement

#61

20130273701

2013-10-17

Semiconductor device fabrication method

#62

20130252418

2013-09-26

Electromigration-resistant lead-free solder interconnect structures

#63

20130249066

2013-09-26

ELECTROMIGRATION-RESISTANT LEAD-FREE SOLDER INTERCONNECT STRUCTURES

#64

20130234160

2013-09-12

Silicon carbide semiconductor device and manufacturing method thereof

#65

20130180945

2013-07-18

Method of processing a contact pad

#66

20120139113

2012-06-07

Undercut-repair of barrier layer metallurgy for solder bumps and methods thereof

#67

20120098121

2012-04-26

Semiconductor component having a second passivation layer having a first opening exposing a bond pad and a plurality of second openings exposing a top surface of an underlying first passivation layer

#68

20110317385

2011-12-29

Wafer level package (WLP) device having bump assemblies including a barrier metal

#69

20110233782

2011-09-29

Electronic device package and fabrication method thereof