209596 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bump connectors; Manufacturing methods related thereto; Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body Flow barriers
INTERCONNECT FOR IC PACKAGE
#2ELECTRONIC DEVICE
#3A SEMICONDUCTOR STRUCTURE AND METHOD MAKING THE SAME
#4Method for packaging stacking flip chip
#5ELECTRONIC PACKAGE
#6ELECTRONIC PACKAGE, PACKAGING SUBSTRATE AND FABRICATING METHOD THEREOF
#7SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
#8PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME
#9SEMICONDUCTOR ASSEMBLY INCLUDING MULTIPLE SOLDER MASKS
#10SEMICONDUCTOR PACKAGE
#11INTERCONNECT FOR IC PACKAGE
#12Methods of manufacturing semiconductor device with bump interconnection
#13Metal-bump sidewall protection
#14Printed circuit board and electronic component package
#15PACKAGED SEMICONDUCTOR DEVICES WITH UNIFORM SOLDER JOINTS
#16Metal-bump sidewall protection
#17Semiconductor device
#18Manufacturing of flip-chip electronic device with carrier having heat dissipation elements free of solder mask
#19Semiconductor device package with improved die pad and solder mask design
#20Metal-bump sidewall protection
#21Method of manufacturing substrate structure with filling material formed in concave portion
#22Mounting structure and module
#23Flip-chip method
#24Circuit substrate
#25Trace Design for Bump-on-Trace (BOT) Assembly
#26Packaged semiconductor devices and methods of packaging thereof
#27Package substrate and semiconductor package including the same
#28Flip-chip electronic device with carrier having heat dissipation elements free of solder mask
#29Bump-on-trace packaging structure and method for forming the same
#30ELECTRICAL COMPONENT WITH THIN SOLDER RESIST LAYER AND METHOD FOR THE PRODUCTION THEREOF
#31Fiducial mark for chip bonding
#32Packaged semiconductor device with a reflow wall
#33Trace design for bump-on-trace (BOT) assembly
#34Packaging device having plural microstructures disposed proximate to die mounting region
#35Wiring board and semiconductor device
#36Package substrate and LED flip chip package structure
#37Semiconductor chip mounted on a packaging substrate
#38Semiconductor substrate and semiconductor package structure having the same
#39Flip-chip electronic device with carrier having heat dissipation elements free of solder mask
#40Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
#41Packaging device having plural microstructures disposed proximate to die mounting region
#42Copper pillar sidewall protection
#43Solder bump reflow by induction heating
#44Flip-chip hybridisation of two microelectronic components using a UV anneal
#45Wiring board and manufacturing method of the same
#46Chip stack with electrically insulating walls
#47Method for aligning micro-electronic components
#48Semiconductor device and method of forming conductive layer over substrate with vents to channel bump material and reduce interconnect voids
#49Copper pillar bump and flip chip package using same
#50Electronic device
#51Chip interposer, semiconductor device, and method for manufacturing a semiconductor device
#52Semiconductor packages and methods of packaging semiconductor devices
#53Flip-chip hybridization of microelectronic components by local heating of connecting elements
#54Semiconductor device
#55Method of manufacturing semiconductor device and semiconductor device
#56Semiconductor device and method of confining conductive bump material with solder mask patch
#57Bump structures having an extension
#58Semiconductor device and method for manufacturing the same
#59Bump-on-trace packaging structure and method for forming the same
#60Mounting structure of electronic component with joining portions and method of manufacturing the same
#61Semiconductor device and method of forming base substrate with recesses for capturing bumped semiconductor die
#62Mounting structure and mounting method
#63Receiver module and device
#64Piezoelectric device
#65Semiconductor device with conductive layer over substrate with vents to channel bump material and reduce interconnect voids
#66Chip package structure and method for manufacturing the same
#67Semiconductor device and method of forming base substrate with cavities formed through etch-resistant conductive layer for bump locking
#68Semiconductor Device and Method of Forming Substrate With Seated Plane for Mating With Bumped Semiconductor Die
#69Method of manufacturing semiconductor device
#70Semiconductor device and method of confining conductive bump material with solder mask patch
#71Semiconductor device and method of forming base substrate with recesses for capturing bumped semiconductor die
#72Semiconductor device and method of forming base substrate with cavities formed through etch-resistant conductive layer for bump locking
#73Wiring substrate, semiconductor device, and method for manufacturing wiring substrate
#74Ferroelectric component and manufacturing the same
#75Method for forming pattern and a wired board
#76Semiconductor Device and Method of Confining Conductive Bump Material with Solder Mask Patch
#77Interconnection of lead frame to die utilizing flip chip process
#78INTEGRATED CIRCUIT DEVICE WITH IMPROVED UNDERFILL COVERAGE
#79Method for mutually connecting substrates, flip chip mounting body, and mutual connection structure between substrates
#80Production of integrated circuit chip packages prohibiting formation of micro solder balls
#81PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE
#82Interconnection of lead frame to die utilizing flip chip process
#83Flip-chip mounting substrate and flip-chip mounting method
#84Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
#85Integrated circuit package system with interconnection support and method of manufacture thereof
#86Flip chip interconnection system having solder position control mechanism
#87Mounting structure
#88ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF
#89Semiconductor device and manufacturing method thereof
#90ISOLATED SOLDER PADS
#91Methods and apparatus for flip-chip-on-lead semiconductor package
#92Interconnection substrate and semiconductor device, manufacturing method of interconnection substrate
#93Flip-chip mounting substrate
#94Semiconductor device having recessed connector portions
#95Circuit board, method for manufacturing the same, semiconductor device, and method for manufacturing the same
#96Semiconductor device and its manufacture method capable of preventing short circuit of electrodes when semiconductor device is mounted on sub-mount substrate
#97Flip-chip mounting substrate and flip-chip mounting method
#98Integrated circuit package system with downset lead
#99Integrated circuit package system with interconnect support
#100Methods and apparatus for Flip-Chip-On-Lead semiconductor package
#101Circuit board providing coplanarity of solders and high soldering reliability for semiconductor component
#102Package board and semiconductor device
#103Insulating layer between bumps of semiconductor chip, and display panel using the same with anisotropic conductive film between semiconductor chip and substrate
#104Submount for light emitting device
#105Method for forming a conductive pattern and a wired board
#106Structure for mounting electronic component on wiring board
#107Surface mounting structure for surface mounting an electronic component
#108Semiconductor device and its manufacture method capable of preventing short circuit of electrodes when semiconductor device is mounted on sub-mount substrate
#109Electronic component-built-in module