209603 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bump connectors; Manufacturing methods related thereto; Manufacturing methods Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
Sub-classes:SEMICONDUCTOR DEVICE ASSEMBLY WITH SACRIFICIAL PILLARS AND METHODS OF MANUFACTURING SACRIFICIAL PILLARS
#2METHOD AND SYSTEM FOR VERIFYING INTEGRATED CIRCUIT STACK
#3SEMICONDUCTOR PACKAGE INCLUDING BALL GRID ARRAY CONNECTIONS WITH IMPROVED RELIABILITY
#4METHODS AND APPARATUS FOR OPTICAL THERMAL TREATMENT IN SEMICONDUCTOR PACKAGES
#5Semiconductor device assembly with sacrificial pillars and methods of manufacturing sacrificial pillars
#6SEMICONDUCTOR DEVICE WITH INTERCONNECT STRUCTURE HAVING GRAPHENE LAYER AND METHOD FOR PREPARING THE SAME
#7BUMP STRUCTURE AND METHOD OF MAKING THE SAME
#83D FAN-OUT PACKAGING STRUCTURE OF INTERCONNECTION SYSTEM WITH ULTRA-HIGH DENSITY AND METHOD FOR MANUFACTURING THE SAME
#9SEMICONDUCTOR DEVICE WITH INTERCONNECT STRUCTURE HAVING GRAPHENE LAYER AND METHOD FOR PREPARING THE SAME
#10Method and system for verifying integrated circuit stack having photonic device
#11Flip chip package structure and manufacturing method thereof
#12Method of manufacturing a semiconductor device
#13Semiconductor device assembly with sacrificial pillars and methods of manufacturing sacrificial pillars
#14Thermally and electrically conductive interconnects
#15Semiconductor device assembly with sacrificial pillars and methods of manufacturing sacrificial pillars
#16Packaged semiconductor device with electroplated pillars
#17Semiconductor device with interconnect structure and method for preparing the same
#18Method and system for verifying integrated circuit stack having photonic device
#19Corner guard for improved electroplated first level interconnect bump height range
#20Packaged semiconductor device with electroplated pillars
#21Chip package structure with dummy bump and method for forming the same
#22Interconnections for a substrate associated with a backside reveal
#23Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
#24Interconnections for a substrate associated with a backside reveal
#25Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
#26Display device and manufacturing method thereof
#27Apparatus and methods for creating environmentally protective coating for integrated circuit assemblies
#28Interconnections for a substrate associated with a backside reveal
#29Semiconductor devices and methods of forming thereof
#30Preventing misshaped solder balls
#31Package on package structure
#32Method for producing resin-encapsulated electronic component, bump-formed plate-like member, resin-encapsulated electronic component, and method for producing bump-formed plate-like member
#33Double solder bumps on substrates for low temperature flip chip bonding
#34TSV structures and methods for forming the same
#35Semiconductor devices and methods of forming thereof
#36Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
#37Double solder bumps on substrates for low temperature flip chip bonding
#38Semiconductor package including a substrate with a stepped sidewall structure
#39TSV structures and methods for forming the same
#40Package on package structure
#41Overcoming chip warping to enhance wetting of solder bumps and flip chip attaches in a flip chip package
#42Double solder bumps on substrates for low temperature flip chip bonding
#43Package on package structure
#44TSV structures and methods for forming the same
#45Through Silicon Via and Method of Manufacturing the Same
#46SEMICONDUCTOR CHIP, STACKED CHIP SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND FABRICATING METHOD THEREOF
#47Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
#48Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices