209606 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bump connectors; Manufacturing methods related thereto; Manufacturing methods; Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for protecting parts during the process
BUMP INTEGRATION WITH REDISTRIBUTION LAYER
#2SHEET FOR FORMING FIRST PROTECTIVE MEMBRANE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND USE OF SHEET
#3ENABLING MICRO-BUMP ARCHITECTURES WITHOUT THE USE OF SACRIFICIAL PADS FOR PROBING A WAFER
#4PASSIVATION LAYERS WITH ROUNDED CORNERS
#5BUMP INTEGRATION WITH REDISTRIBUTION LAYER
#6ELECTRONIC DEVICE WITH SENSOR FACE STRESS PROTECTION
#7Passivation layers with rounded corners
#8ELECTRONIC DEVICE HAVING CHEMICALLY COATED BUMP BONDS
#9Semiconductor devices and preparation methods thereof
#10CHIP STRUCTURE AND CHIP PREPARATION METHOD
#11Bump integration with redistribution layer
#12Solder joints on nickel surface finishes without gold plating
#13Solderless interconnection structure and method of forming same
#14Method of manufacturing semiconductor device
#15Semiconductor package and manufacturing method thereof
#16Metal-bump sidewall protection
#17Semiconductor device
#18Conductive vias in semiconductor packages and methods of forming same
#19Semiconductor device and method of forming the same
#20Solderless interconnection structure and method of forming same
#21Package-on-package (PoP) structure including stud bulbs
#22Conductive vias in semiconductor packages and methods of forming same
#233D packaging method for semiconductor components
#24Semiconductor device including solder bracing material with a rough surface, and manufacturing method thereof
#25Packaging method and package structure for image sensing chip
#26SEMICONDUCTOR DEVICE WITH COPPER MIGRATION STOPPING OF A REDISTRIBUTION LAYER
#27Package-on-package (PoP) structure including stud bulbs
#28Semiconductor package structure and method for forming the same
#29Semiconductor structure
#30Solderless interconnection structure and method of forming same
#31Cu pillar bump with L-shaped non-metal sidewall protection structure
#32Conductive contacts having varying widths and method of manufacturing same
#33Semiconductor package structure and method for forming the same
#34Semiconductor devices and methods of forming thereof
#35Package on-package (PoP) structure including stud bulbs
#36Semiconductor device and manufacturing method of the same
#37Power semiconductor device with a double metal contact and related method
#38Semiconductor Device Manufacturing Method
#39Method for fabricating electronic device package
#40Bump structure and method of forming same
#41Copper pillar sidewall protection
#42Semiconductive packaging device and manufacturing method thereof
#43Method of forming a semiconductor device and structure therefor
#44Package on-Package (PoP) structure including stud bulbs and method
#45METHOD FOR FORMING BUMPS, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME, SUBSTRATE PROCESSING APPARATUS, AND SEMICONDUCTOR MANUFACTURING APPARATUS
#46Semiconductor devices and methods of forming thereof
#47METHODS OF FORMING HYDROPHOBIC SURFACES ON SEMICONDUCTOR DEVICE STRUCTURES, METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES, AND SEMICONDUCTOR DEVICE STRUCTURES
#48Semiconductor substrate and method for making the same
#49Structures having a tapering curved profile and methods of making same
#50Methods of forming hydrophobic surfaces on semiconductor device structures, methods of forming semiconductor device structures, and semiconductor device structures
#51Package-on-package (PoP) structure including stud bulbs and method
#52Semiconductor device with solder bump formed on high topography plated Cu pads
#53Cu pillar bump with L-shaped non-metal sidewall protection structure
#54Electronic device package and fabrication method thereof
#55Semiconductor device with solder bump formed on high topography plated Cu pads
#56Power semiconductor device including a double metal contact
#57Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus
#58Method of forming solder bump on high topography plated Cu
#59Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus