208272 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed; Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices; Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation comprising at least one long range structurally disordered material, e.g. one-dimensional vertical amorphous superlattices
METHODS OF FORMING BOTTOM DIELECTRIC ISOLATION LAYERS
#2SEMICONDUCTOR DEVICES INCLUDING LOCALIZED SEMICONDUCTOR-ON-INSULATOR (SOI) REGIONS
#3SOURCE DRAIN FORMATION IN GATE ALL AROUND TRANSISTOR
#4Semiconductor Structures
#5Methods of forming bottom dielectric isolation layers
#6Method for making superlattice structures with reduced defect densities
#7Method for making superlattice structures with reduced defect densities
#8Cascade tunneling field effect transistors
#9NITRIDE SEMICONDUCTOR ELEMENT AND NITRIDE SEMICONDUCTOR PACKAGE
#10Nitride semiconductor element and nitride semiconductor package
#11Methods of forming substrate structures and semiconductor components
#12Semiconductor device including a superlattice and replacement metal gate structure and related methods
#13Substrate structure, semiconductor component and method
#14Nitride semiconductor element and nitride semiconductor package
#15Nitride semiconductor wafer, nitride semiconductor element, and method for manufacturing nitride semiconductor wafer
#16Nitride semiconductor element and nitride semiconductor package
#17AMORPHOUS MULTI-COMPONENT METAL/METAL OXIDE NANOLAMINATE METAMATERIALS AND DEVICES BASED THEREON
#18SEMICONDUCTOR STRUCTURE
#19Nitride semiconductor element and nitride semiconductor package
#20Semiconductor device including a metal-to-semiconductor superlattice interface layer and related methods
#21Method for making a semiconductor device including a superlattice with regions defining a semiconductor junction