208481 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched; Unipolar devices, e.g. field effect transistors; Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
Implantation method for doping semiconductor substrate
#3002Three-dimensional integrated circuit structure
#3003Nickel silicide including indium and a method of manufacture therefor
#3004Method of manufacturing silicide layer for semiconductor device
#3005Semiconductor devices and methods of manufacture thereof
#3006Radiation hardened isolation structures and fabrication methods
#3007Semiconductor device having an organic anti-reflective coating (ARC) and method therefor
#3008Semiconductor device including high voltage and low voltage MOS devices
#3009Transistor Structures
#3010SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
#3011Active region spacer for semiconductor devices and method to form the same
#3012SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
#3013Method of manufacturing semiconductor device
#3014Isolation body for semiconductor devices and method to form the same
#3015Semiconductor device and method of manufacturing the same
#3016Method of producing thin films
#3017SEMICONDUCTOR DEVICE
#3018Multi-metal-oxide high-K gate dielectrics
#3019Semiconductor integrated circuit and method of manufacturing the same
#3020TECHNIQUE FOR REDUCING CRYSTAL DEFECTS IN STRAINED TRANSISTORS BY TILTED PREAMORPHIZATION
#3021MOS transistor manufacturing
#3022Method and structure for enhancing both nMOSFET and pMOSFET performance with a stressed film
#3023Spacer barrier structure to prevent spacer voids and method for forming the same
#3024Transistor with dielectric stressor element fully underlying the active semiconductor region
#3025Method and structure for enhancing both nMOSFET and pMOSFET performance with a stressed film
#3026CMOS circuits including a passive element having a low end resistance
#3027Cooling semiconductor device and manufacturing method thereof
#3028Transistor having dielectric stressor elements at different depths from a semiconductor surface for applying shear stress
#3029SIDEWALL MOSFETS WITH EMBEDDED STRAINED SOURCE/DRAIN
#3030Structure and method for MOSFET with reduced extension resistance
#3031Double-extension formation using offset spacer
#3032Fabricating method of CMOS and MOS device
#3033CMOS AND MOS DEVICE
#3034MOS device with a high voltage isolation structure
#3035Rotational shear stress for charge carrier mobility modification
#3036Low threshold voltage PMOS apparatus and method of fabricating the same
#3037Semiconductor device including insulated gate type transistor and insulated gate type variable capacitance, and method of manufacturing the same
#3038Semiconductor device with MISFET
#3039Semiconductor device and method of manufacturing the same
#3040Methods of forming field effect transistors using disposable aluminum oxide spacers
#3041Method of forming a field effect transistor
#3042Methods of fabricating high voltage MOSFET having doped buried layer
#3043Nitrogen based implants for defect reduction in strained silicon
#3044Methods of fabricating integrated circuit devices using anti-reflective coating as implant blocking layer
#3045Gate electrode and MOS transistor including gate and method of fabricating the same
#3046Semiconductor device for improving channel mobility
#3047Semiconductor device having a silicide layer and manufacturing method thereof
#3048Implant and anneal amorphization process
#3049Method of forming amorphous source/drain extensions
#3050Method of manufacturing semiconductor device
#3051Method for manufacturing semiconductor device
#3052Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain
#3053Transistor having dielectric stressor elements for applying in-plane shear stress
#3054Semiconductor device and method for fabricating the same
#3055Semiconductor device and manufacturing method of the same
#3056Implant damage control by in-situ C doping during SiGe epitaxy for device applications
#3057Integrated circuit using complementary junction field effect transistor and MOS transistor in silicon and silicon alloys
#3058Ultra shallow junction formation by solid phase diffusion
#3059Method of fabricating semiconductor devices
#3060Formation of standard voltage threshold and low voltage threshold MOSFET devices
#3061Formation of standard voltage threshold and low voltage threshold MOSFET devices
#3062Method of fabricating gate dielectric layer and method of fabricating semiconductor device
#3063Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabricating same
#3064Low threshold voltage semiconductor device with dual threshold voltage control means
#3065Silicided regions for NMOS and PMOS devices
#3066Semiconductor device and method for fabricating the same
#3067Semiconductor device and method for fabricating the same
#3068Transistor having high mobility channel and methods
#3069MOSFET structure with multiple self-aligned silicide contacts
#3070Trench isolation structure having an implanted buffer layer
#3071SRAM semiconductor device with a compressive stress-inducing insulating film and a tensile stress-inducing insulating film
#3072Integrated circuit eliminating source/drain junction spiking
#3073Semiconductor device and method of manufacturing such a semiconductor device
#3074Method of manufacturing semiconductor device carrying out ion implantation before silicide process
#3075Isolation structure for semiconductor device including double diffusion isolation region forming PN junction with neighboring wells and isolation region beneath
#3076Strained silicon device
#3077Process of forming an electronic device including active regions and gate electrodes of different compositions overlying the active regions
#3078CMOS device fabrication method with PMOS interface insulating film formed concurrently with sidewall insulating film
#3079PLANAR ULTRA-THIN SEMICONDUCTOR-ON-INSULATOR CHANNEL MOSFET WITH EMBEDDED SOURCE/DRAIN
#3080Semiconductor device and method for fabricating the same
#3081Integrated circuit with depletion mode JFET
#3082Method of fabricating silicon nitride layer and method of fabricating semiconductor device
#3083Formation of gate dielectrics with uniform nitrogen distribution
#3084Semiconductor Device Having a Fully Silicided Gate Electrode and Method of Manufacture Therefor
#3085Semiconductor device and method for manufacturing the same
#3086Contact structure having silicide layers, semiconductor device employing the same, and methods of fabricating the contact structure and semiconductor device
#3087Selective deposition of germanium spacers on nitride
#3088Salicide process
#3089Method of forming carbon-containing silicon nitride layer
#3090Semiconductor device and method for fabricating the same
#3091Semiconductor device and its manufacture
#3092Semiconductor devices with enlarged recessed gate electrodes
#3093Semiconductor device
#3094Threshold voltage control layer in a semiconductor device
#3095Multistep etching method
#3096Semiconductor device including an electrostatic discharge protection element
#3097Semiconductor device and method of manufacturing the same
#3098Nickel alloy silicide including indium and a method of manufacture therefor
#3099Semiconductor device manufacturing method
#3100Method for fabricating electronic device
#3101Semiconductor structure having selective silicide-induced stress and a method of producing same
#3102High voltage metal oxide semiconductor transistor and fabricating method thereof
#3103Semiconductor device and method of fabricating same
#3104System and method for ensuring migratability of circuits by masking portions of the circuits while improving performance of other portions of the circuits
#3105Semiconductor device
#3106MOSFET package
#3107MOSFET package
#3108Surface treatment method, manufacturing method of semiconductor device, and manufacturing method of capacitive element
#3109Method to obtain fully silicided poly gate
#3110Method and structure for shallow trench isolation during integrated circuit device manufacture
#3111Shallow source/drain regions for CMOS transistors
#3112Metal-Insulator-Metal (MIM) Capacitors Formed Beneath First Level Metallization and Methods of Forming Same
#3113Semiconductor device having a gate electrode material feature located adjacent a gate width side of its gate electrode and a method of manufacture therefor
#3114METAL GATE MOSFET BY FULL SEMICONDUCTOR METAL ALLOY CONVERSION
#3115MOS devices with reduced recess on substrate surface
#3116Semiconductor device and method for manufacturing the same
#3117Semiconductor device and method of fabricating the same
#3118Method for manufacturing MOS transistor of semiconductor device
#3119METHODS OF FORMING A METAL OXIDE LAYER INCLUDING ZIRCONIUM OXIDE AND METHODS OF FORMING A CAPACITOR FOR SEMICONDUCTOR DEVICES INCLUDING THE SAME
#3120Semiconductor device and method for fabricating the same
#3121Method for forming uniaxially strained devices
#3122Semiconductor processing methods
#3123Semiconductor device and method of manufacturing the same
#3124Field effect transistor and method of manufacturing the same
#3125Semiconductor device
#3126SOI device with reduced drain induced barrier lowering
#3127Method of manufacturing high-voltage device
#3128Manufacturing method for forming all regions of the gate electrode silicided
#3129Method for fabricating semiconductor device with fully silicided gate electrode
#3130Method and system for manufacturing semiconductor device having less variation in electrical characteristics
#3131Protruding spacers for self-aligned contacts
#3132Semiconductor device and method for fabricating the same
#3133Semiconductor device having a shared contact and method of fabricating the same
#3134Method for reducing dendrite formation in nickel silicon salicide processes
#3135Semiconductor processing method and field effect transistor
#3136Method to engineer etch profiles in Si substrate for advanced semiconductor devices
#3137Method and structure for forming strained SI for CMOS devices
#3138Image sensor having multi-gate insulating layers and fabrication method
#3139Piezoelectric stress liner for bulk and SOI
#3140High-voltage device structure
#3141Semiconductor device, gate electrode and method of fabricating the same
#3142High performance MOS device with graded silicide
#3143Direct channel stress
#3144Method of forming a MOS device having a strained channel region
#3145Method for forming semiconductor devices having reduced gate edge leakage current
#3146Field effect transistor and manufacturing method thereof
#3147Method for fabricating semiconductor device
#3148Method of manufacturing a non-volatile semiconductor memory device
#3149Sacrificial capping layer for transistor performance enhancement
#3150Material systems for dielectrics and metal electrodes
#3151Closed loop CESL high performance CMOS device
#3152Circuits and Integrated Circuits Including Field Effect Transistors Having Differing Body Effects
#3153FINFET including a superlattice
#3154Method of making a metal gate semiconductor device
#3155Semiconductor device and manufacturing method thereof
#3156Method for Making a FINFET Including a Superlattice
#3157Replacement gate field effect transistor with germanium or SiGe channel and manufacturing method for same using gas-cluster ion irradiation
#3158Semiconductor device
#3159Method of forming self-aligned low-k gate cap
#3160Method of forming metal/high-k gate stacks with high mobility
#3161Method of manufacturing semiconductor device and semiconductor device
#3162Super anneal for process induced strain modulation
#3163Semiconductor structure and method for forming thereof
#3164Fabrication method of semiconductor device
#3165Impurity co-implantation to improve transistor performance
#3166Methods of forming self-aligned silicide layers using multiple thermal processes
#3167Method of forming polycide layer and method of manufacturing semiconductor device having polycide layer
#3168Semiconductor device fabrication method
#3169Semiconductor device and method for fabricating the same
#3170Method for forming a sealed storage non-volative multiple-bit memory cell
#3171Semiconductor local interconnect and contact
#3172CMOS fabrication
#3173CMOS fabrication
#3174Analog/digital converting device
#3175Semiconductor device with a structure suitable for miniaturization
#3176High-voltage MOS device with dummy diffusion region
#3177Method of manufacturing a semiconductor integrated circuit device
#3178Semiconductor device and method of producing same
#3179Semiconductor device and method for fabricating the same
#3180Semiconductor device and method of manufacturing the same
#3181Semiconductor integrated circuit device having deposited layer for gate insulation
#3182METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING A DOPANT BLOCKING SUPERLATTICE
#3183MANUFACTURING PROCESS OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
#3184Method for making a semiconductor device including shallow trench isolation (STI) regions with a superlattice therebetween
#3185Semiconductor device having cell transistor with recess channel structure
#3186Methods for transistor formation using selective gate implantation
#3187Methods for Transistor Formation Using Selective Gate Implantation
#3188Semiconductor device and method of manufacturing the same
#3189Semiconductor Device Including Shallow Trench Isolation (STI) Regions with a Superlattice Therebetween
#3190Semiconductor device and manufacturing of the same
#3191Semiconductor device structure and method therefor
#3192Novel semiconductor device with improved channel strain effect
#3193Semiconductor device including insulated gate type transistor and insulated gate type capacitance, and method of manufacturing the same
#3194Multi-silicide system in integrated circuit technology
#3195Method for implanting ions to a wafer for manufacturing of semiconductor device and method of fabricating graded junction using the same
#3196Methods of forming electronic devices including high-k dielectric layers and electrode barrier layers and related structures
#3197Method for manufacturing semicondutor device
#3198Methods of forming field effect transistors and methods of forming field effect transistor gates and gate lines
#3199Methods that mitigate excessive source/drain silicidation in full gate silicidation metal gate flows
#3200Semiconductor device with shallow trench isolation and its manufacture method
#3201Enhanced access devices using selective epitaxial silicon over the channel region during the formation of a semiconductor device and systems including same
#3202Semiconductor device with spacer having batch and non-batch layers
#3203Methods of forming hafnium-containing materials
#3204Silicide process utilizing pre-amorphization implant and second spacer
#3205Methodology for deposition of doped SEG for raised source/drain regions
#3206Method of manufacturing spacer
#3207Semiconductor device and fabrication method
#3208Constructions comprising hafnium oxide
#3209High voltage field effect device and method
#3210Removal of charged defects from metal oxide-gate stacks
#3211Semiconductor device structure for reducing hot carrier effect of MOS transistor
#3212Semiconductor device comprising extensions produced from material with a low melting point
#3213Method for improving the thermal stability of silicide
#3214Technique for forming a contact insulation layer with enhanced stress transfer efficiency
#3215Split-channel antifuse array architecture
#3216Field effect transistors (FETs) with multiple and/or staircase silicide
#3217Field effect transistor with mixed-crystal-orientation channel and source/drain regions
#3218Semiconductor device for limiting leakage current
#3219Masked spacer etching for imagers
#3220Method of manufacturing semiconductor device
#3221Methods of producing integrated circuit devices utilizing tantalum amine derivatives
#3222Methods of forming semiconductor constructions
#3223Method for manufacturing semiconductor device capable of improving breakdown voltage characteristics
#3224Semiconductor device and boost circuit
#3225DOPED NITRIDE FILM, DOPED OXIDE FILM AND OTHER DOPED FILMS AND DEPOSITION RATE IMPROVEMENT FOR RTCVD PROCESSES
#3226Semiconductor device and manufacturing method for the same
#3227Triple well structure and method for manufacturing the same
#3228Strained complementary metal oxide semiconductor (CMOS) on rotated wafers and methods thereof
#3229Structures and methods for forming a locally strained transistor
#3230Method of forming a semiconductor device having a high-k dielectric
#3231Semiconductor device and manufacturing method thereof
#3232METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING A MEMORY CELL WITH A NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE
#3233Step-embedded SiGe structure for PFET mobility enhancement
#3234Semiconductor substrates and field effect transistor constructions
#3235Method for fabricating semiconductor device
#3236Semiconductor device and a method of manufacturing the same
#3237METHOD OF FABRICATING SEMICONDUCTOR DEVICES AND METHOD OF ADJUSTING LATTICE DISTANCE IN DEVICE CHANNEL
#3238Method of doping a gate electrode of a field effect transistor
#3239SiGe nickel barrier structure employed in a CMOS device to prevent excess diffusion of nickel used in the silicide material
#3240Semiconductor integrated circuit and wafer having diffusion regions differing in thickness and method for manufacturing the same
#3241Nickel silicide including indium and a method of manufacture therefor
#3242Method of producing highly strained PECVD silicon nitride thin films at low temperature
#3243Method of manufacturing semiconductor device that utilizes oxidation prevention film to form thick and thin gate insulator portions
#3244Method of making a transistor with a sloped drain diffusion layer
#3245Semiconductor memory device and method of manufacturing the same
#3246Method for Making a Microelectromechanical Systems (MEMS) Device Including a Superlattice
#3247MOSFET structure with ultra-low K spacer
#3248Semiconductor device
#3249SEMICONDUCTOR DEVICE INCLUDING A DOPANT BLOCKING SUPERLATTICE
#3250Method for controlling spacer oxide loss
#3251Smart grading implant with diffusion retarding implant for making integrated circuit chips
#3252Silicide process utilizing pre-amorphization implant and second spacer
#3253Using Oxynitride Spacer to Reduce Parasitic Capacitance in CMOS Devices
#3254Method for annealing and method for manufacturing a semiconductor device
#3255Semiconductor device and method for fabricating the same
#3256Semiconductor device
#3257Semiconductor device, method for manufacturing the same, and gate electrode structure
#3258Semiconductor device and method for manufacturing the same
#3259Semiconductor device with gate insulating film and manufacturing method thereof
#3260Semiconductor memory device and method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device
#3261Silicide structure for ultra-shallow junction for MOS devices
#3262Shallow-junction fabrication in semiconductor devices via plasma implantation and deposition
#3263METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE AND METHOD FOR REGULATING SPEED OF FORMING AN INSULATING FILM
#3264Semiconductor device and method for fabricating the same
#3265Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device
#3266P-channel MOS transistor and fabrication process thereof
#3267SEMICONDUCTOR INTEGRATED CIRCUIT AND CMOS TRANSISTOR
#3268Fabrication of semiconductor devices using anti-reflective coatings
#3269Method for manufacturing field effect transistor
#3270High stress nitride film and method for formation thereof
#3271Source/Drain Extensions Having Highly Activated and Extremely Abrupt Junctions
#3272Methods of forming threshold voltage implant regions
#3273Methods of implanting dopant into channel regions
#3274Method for fabricating ultra-high tensile-stressed film and strained-silicon transistors thereof
#3275Highly activated carbon selective epitaxial process for CMOS
#3276MOSFET package
#3277MOSFET package
#3278Field effect transistor with gate spacer structure and low-resistance channel coupling
#3279Method of making a nitrided gate dielectric
#3280Abrupt “delta-like” doping in Si and SiGe films by UHV-CVD
#3281High performance transistors with SiGe strain
#3282Method for fabricating silicon nitride film
#3283Transistor having a metal nitride layer pattern, etchant and methods of forming the same
#3284Method of manufacturing metal-oxide-semiconductor transistor
#3285Methods of forming semiconductor devices having metal gate electrodes and related devices
#3286Highly conductive shallow junction formation
#3287Methods of forming capacitor structures
#3288Method for manufacturing non-volatile memory devices integrated in a semiconductor substrate
#3289Implantation method to improve ESD robustness of thick gate-oxide grounded-gate NMOSFET's in deep-submicron CMOS technologies
#3290Wing gate transistor for integrated circuits
#3291Source/drain extension implant process for use with short time anneals
#3292Method for forming a notched gate
#3293Method of manufacturing a capacitor and a metal gate on a semiconductor device
#3294Semiconductor device having a high carbon content strain inducing film and a method of manufacture therefor
#3295In situ formed halo region in a transistor device
#3296Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps
#3297Semiconductor devices with buried isolation regions
#3298Semiconductor structure with high-voltage sustaining capability and fabrication method of the same
#3299Semiconductor circuit constructions
#3300Semiconductor device and method of manufacturing the same