Integrated circuit device mounting with folded substrate and interposer

Semiconductor device and electronic device

Micro-machined structure production using encapsulation

Top layers of metal for high performance IC's

Method for fabricating a circuit component

Semiconductor package, manufacturing method thereof and IC chip

SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME

Manufacturing method for micro-SD flash memory card

Electronic package

Flux overspray removal masks with channels, methods of assembling same, and systems containing same

Memory Module Including A Plurality Of Integrated Circuit Memory Devices And A Plurality Of Buffer Devices In A Matrix Topology

Printed circuit board

Contact Pad And Bump Pad Arrangement for High-Lead Or Lead-Free Bumps

Thin passivation layer on 3D devices

Three-dimensional integrated circuits with protection layers

Semiconductor integrated circuit

DEVICE HAVING CONTACT PAD WITH A CONDUCTIVE LAYER AND A CONDUCTIVE PASSIVATION LAYER

Semiconductor processing methods, methods of forming contact pads, and methods of forming electrical connections between metal-containing layers

Top layers of metal for high performance IC's

Top layers of metal for high performance IC's

Dummy patterns and method of manufacture for mechanical strength of low K dielectric materials in copper interconnect structures for semiconductor devices

STRUCTURE FOR CONTROLLED COLLAPSE CHIP CONNECTION WITH A CAPTURED PAD GEOMETRY

Metal particles-dispersed composition and flip chip mounting process and bump-forming process using the same

Tubular-shaped bumps for integrated circuit devices and methods of fabrication

Circuit device with at least partial packaging and method for forming

Semiconductor integrated circuit package having electrically disconnected solder balls for mounting

Chip package and method of manufacturing the same

WAFER LEVEL PACKAGE WITH GOOD CTE PERFORMANCE

Stacked package and method for manufacturing the package

Integrated circuit package system with thermo-mechanical interlocking substrates

3D ELECTRONIC PACKAGING STRUCTURE WITH ENHANCED GROUNDING PERFORMANCE AND EMBEDDED ANTENNA

Integrated circuit package system employing a support structure with a recess

Leadframe on heat sink (LOHS) semiconductor packages and fabrication methods thereof

Semiconductor device package diepad having features formed by electroplating

Lead-frame circuit package

Integrated circuit package with elevated edge leadframe

Semiconductor device encapsulated by an electrically conductive plastic housing composition with conductive particles

Printed electronic substrate havine photochromic barrier layer

Printed circuit board

RFID label technique

Method for moving a mounting head unit

Post passivation interconnection schemes on top of the IC chips

Method of sputtering a nickel silicon alloy, especially useful for forming a solder bump barrier

Microelectronic devices and methods for forming interconnects in microelectronic devices

Manufacturing method of semiconductor device

Die positioning for packaged integrated circuits

Semiconductor device and fabrication method thereof

METHOD OF MANUFACTURING MULTI-STACK PACKAGE

Method of making semiconductor device

Lighting equipment

Integrated circuit package system employing thin profile techniques

Method for manufacturing an antenna

Liquid metal thermal interface material system

Semiconductor device

Electronic device and method of manufacturing the same, chip carrier, circuit board, and electronic instrument

INTEGRATED CIRCUITS WITH CONDUCTIVE FEATURES IN THROUGH HOLES PASSING THROUGH OTHER CONDUCTIVE FEATURES AND THROUGH A SEMICONDUCTOR SUBSTRATE

Chip structure and process for forming the same

Structure and process for WL-CSP with metal cover

Direct via wire bonding and method of assembling the same

Solder Bump/Under Bump Metallurgy Structure for High Temperature Applications

Semiconductor device, method for manufacturing the same, and semiconductor device mounting structure

Packaged integrated circuit with enhanced thermal dissipation

High power semiconductor package and method of making the same

Semiconductor package and method for manufacturing the same

Stacked integrated circuit package-in-package system

Stacked integrated circuit package-in-package system

Stackable integrated circuit package system

MULTI-CHIPS PACKAGE AND METHOD OF FORMING THE SAME

Carrierless chip package for integrated circuit devices, and methods of making same

Wire bond interconnection

LDO regulator with ground connection through package bottom

Integrated circuit package system employing structural support

Electrical/optical integration scheme using direct copper bonding

Amplifier chip mounted on a lead frame

Semiconductor wafer

Test structure

Method for manufacturing an electrode and electrode component mounted body

Apparatus and process for precise encapsulation of flip chip interconnects

METHOD OF MAKING A SOCKET TO PERFORM TESTING ON INTEGRATED CIRCUITS AND SOCKET MADE

Method for redirecting void diffusion away from vias in an integrated circuit design

Method for Preparing an Intergrated Circuits Device Having a Reinforcement Structure

Optimum padset for wire bonding RF technologies with high-Q inductors

Packaged microelectronic devices and methods for packaging microelectronic devices

Electroplating method for a semiconductor device

METHOD OF DIE STACKING USING INSULATED WIRE BONDS

Method of fabricating a film-on-wire bond semiconductor device

Integrated circuit package with chip-side signal connections

Reverse build-up process for fine bump pitch approach

Method for forming post passivation Au layer with clean surface

Single Layer Carbon Nanotube-Based Structures and Methods for Removing Heat from Solid-State Devices

Electronic packages and components thereof formed by co-deposited carbon nanotubes

Double Layer Carbon Nanotube-Based Structures and Methods for Removing Heat from Solid-State Devices

Bundle of long thin carbon structures, manufacturing method thereof, and electronic device

Semiconductor storage device with first and second pads arranged in proximity with first to fourth output transistors for reducing an excess region

Microchip assembly including an inductor and fabrication method

COMPLEX MEMORY CHIP, MEMORY CARD HAVING THE SAME, AND METHOD OF MANUFACTURING THE MEMORY CARD

METHOD FOR FORMING RFID TAGS

Assembly comprising a support element and a chip, support element, method for shielding, and method for protecting

Epoxy resin composition for encapsulating semiconductor and semiconductor device

Resin-sealed electronic device and method of manufacturing the same

Wire bond integrated circuit package for high speed I/O

Semiconductor device including microstrip line and coplanar line

Post passivation interconnection process and structures

Semiconductor device and manufacturing method thereof

Semiconductor chip and TAB package having the same

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

System for clamping heat sink

Intergrated Circuits Device Having a Reinforcement Structure

CHIP PACKAGE AND FABRICATING PROCESS THEREOF

Semiconductor device having elastic solder bump to prevent disconnection

Substrate for a flexible microelectronic assembly and a method of fabricating thereof

Stress decoupling structures for flip-chip assembly

Stacked die package

CHIP STACK PACKAGE AND METHOD OF MANUFACTURING THE SAME

DIE STACKING USING INSULATED WIRE BONDS

FILM-ON-WIRE BOND SEMICONDUCTOR DEVICE

Chip on leads

Semiconductor device and manufacturing method thereof

SEMICONDUCTOR INTEGRATED CIRCUIT AND FABRICATION METHOD FOR THE SAME

Semiconductor integrated circuit providing for wire bonding directly above an active circuit region, and manufacturing method thereof

Leadframe, semiconductor package and support lead for bonding with groundwires

Flip-chip mounting resin composition and bump forming resin composition

Fluxless reflow process for bump formation

Component mounting apparatus and component mounting method

Method for decapsulating package

Chip structure and process for forming the same

Stacked structures and methods of fabricating stacked structures

Resin for sealing semiconductor device, resin-sealed semiconductor device and the method of manufacturing the semiconductor device

Method and apparatus for linear die transfer

Reduction of damage to thermal interface material due to asymmetrical load

Electrical Insulating Layer for Metallic Thermal Interface Material

Adhesive composition, adhesive sheet and production process for semiconductor device

Method of mounting semiconductor chip to circuit substrate using solder bumps and dummy bumps

MULTI-COMPONENT ELECTRONIC PACKAGE WITH PLANARIZED EMBEDDED-COMPONENTS SUBSTRATE

Slim design main board

Circuit Device and Manufacturing Method of the Same

ELECTRODE, DEVICE AND ELECTRONIC APPARATUS HAVING THE DEVICE

METHOD AND APPARATUS FOR CREATING RFID DEVICES USING MASKING TECHNIQUES

Silica nanoparticles thermoset resin compositions

Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud-bumps

Three-dimensional wafer stacking with vertical interconnects

Bonding structures and methods of forming bonding structures

Semiconductor device assemblies and systems including at least one conductive pathway extending around a side of at least one semiconductor device

STRUCTURE FOR PREVENTING PAD PEELING AND METHOD OF FABRICATING THE SAME

Bond pad design to minimize dielectric cracking

Semiconductor device including a power device with first metal layer and second metal layer laterally spaced apart

Electronic packaging materials for use with low-k dielectric-containing semiconductor devices

Semiconductor device with no base member and method of manufacturing the same

Solder bump structure and method of manufacturing same

Semiconductor device and a method of manufacturing the same

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE CONTAINING THE SAME

Method of fabricating electronic device having sacrificial anode, and electronic device fabricated by the same

Semiconductor die with reduced bump-to-pad ratio

Systems and methods to passivate on-die redistribution interconnects

Chip and manufacturing method and application thereof

Semiconductor module with at least two substrates

Multi-chip electronic circuit module and a method of manufacturing

Thermally enhanced semiconductor package

Semiconductor device

SEMICONDUCTOR CHIP EMBEDDED IN AN INSULATOR AND HAVING TWO-WAY HEAT EXTRACTION

STACKED CHIP PACKAGE STRUCTURE AND FABRICATING METHOD THEREOF

Module comprising polymer-containing electrical connecting element

Leadframe finger design to ensure lead-locking for enhanced fatigue life of bonding wire in an overmolded package

Stamped leadframe and method of manufacture thereof

Method for producing a semiconductor device including connecting a functional wafer to a carrier substrate and selectively etching the carrier substrate

INTERGRATED CIRCUIT DEVICE, CHIP, AND METHOD OF FABRICATING THE SAME

Top layers of metal for integrated circuits

Semiconductor device and display device having alignment mark

HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF

Memory device and semiconductor device

Semiconductor chips for TAG applications, devices for mounting the same, and mounting method

Flanged transducer having improved rigidity

Interconnect For Microelectronic Structures With Enhanced Spring Characteristics

Stacked Modules and Method

Spread spectrum isolator

Manufacturing method of electronic board and multilayer wiring board

Circuit device

Method for manufacturing semiconductor device with reduced damage to metal wiring layer

Vias having varying diameters and fills for use with a semiconductor device and methods of forming semiconductor device structures including same

Use of palladium in IC manufacturing with conductive polymer bump

Method for manufacturing semiconductor device

Method of packaging a semiconductor device and a prefabricated connector

MODIFIED SOLDER ALLOYS FOR ELECTRICAL INTERCONNECTS, METHODS OF PRODUCTION AND USES THEREOF

Printed circuit board and fabricating method thereof

Lithographic apparatus and method

Method of Manufacturing a Ignition Device and a Semiconductor Device

Semiconductor device and method for manufacturing same

MULTI-CHIP STRUCTURE

Self-aligned through vias for chip stacking

Post passivation interconnection schemes on top of the IC chips

Embedded chip package with improved heat dissipation performance and method of making the same

Integrated circuit chip assembly having array of thermally conductive features arranged in aperture of circuit substrate

Wafer level package with die receiving cavity and method of the same

Wirebond Package Design for High Speed Data Rates

IC package keeping attachment level of leads on chip during molding process

Lead frame unit, semiconductor package having a lead frame unit, stacked semiconductor package having a semiconductor package and methods of manufacturing the same

Packaged semiconductor chips

Packaged semiconductor chips with array

CHIP-PACKAGING COMPOSITIONS INCLUDING CATALYSTS AND HARDENERS, PACKAGES MADE THEREWITH, AND METHODS OF ASSEMBLING SAME

System and method for solder bump plating

Solder joint reliability in microelectronic packaging

Method of making lithographic contact elements

Method of manufacturing a memory card

Method of manufacturing a component-embedded printed circuit board

LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE PACKAGE

Low fabrication cost, high performance, high reliability chip scale package

ELECTRONIC DEVICE

Method of making multi-chip package with high-speed serial communications between semiconductor dice

Method of chip manufacturing

Overmolded electronic module with an integrated electromagnetic shield using SMT shield wall components

Radiation-shielded semiconductor assembly

Module with carrier element

Semiconductor integrated circuit and multi-chip module

Integrated circuit having an uppermost layer comprising landing pads that are distributed thoughout one side of the integrated circuit

Low loop height ball bonding method and apparatus

Structure and method for enhancing resistance to fracture of bonding pads

Flip chip and wire bond semiconductor package

COPPER-METALLIZED INTEGRATED CIRCUITS HAVING AN OVERCOAT FOR PROTECTING BONDABLE METAL CONTACTS AND IMPROVING MOLD COMPOUND ADHESION

High performance system-on-chip using post passivation process

Integrated circuit chips with fine-line metal and over-passivation metal

Low fabrication cost, high performance, high reliability chip scale package

Semiconductor package with embedded die

Wafer level chip size packaged chip device with an N-shape junction inside and method of fabricating the same

Integration using package stacking with multi-layer organic substrates

Multi stack package and method of fabricating the same

Bridge stack integrated circuit package system

PACKAGE DESIGNS FOR VERTICAL CONDUCTION DIE

Integrated circuit package system with encapsulation lock

Integrated circuit package system with heat sink

Component arrangement comprising a carrier

Integrated circuit package system

Through-wafer interconnects for photoimager and memory wafers

Component-embedded circuit board fabrication method

Method of sealing or welding two elements to one another

Low viscosity precursor compositions and methods for the deposition of conductive electronic features

Configurable integrated circuit capacitor array using via mask layers

METHOD FOR ATTACHING INTEGRATED CIRCUIT COMPONENT TO A SUBSTRATE

Nanoparticle filled underfill

STACKABLE MOLDED PACKAGES AND METHODS OF MAKING THE SAME

ULTRATHIN MODULE FOR SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Structure of image sensor module and method for manufacturing of wafer level package

Circuit device and method of manufacturing the same

HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF

Electrical component having external contacting

Semiconductor device having projecting electrode formed by electrolytic plating, and manufacturing method thereof

Semiconductor assembly with one metal layer after base metal removal

Vertical Integration of Passive Component in Semiconductor Device Package for High Electrical Performance

Fan out type wafer level package structure and method of the same

Stacked integrated circuit package-in-package system

CHIP PACKAGE

Integrated Circuit Package and Method for Manufacturing an Integrated Circuit Package

Thin, thermally enhanced flip chip in a leaded molded package

Semiconductor element and process of manufacturing semiconductor element

Electronic device and method for manufacturing thereof

Semiconductor device, wiring of semiconductor device, and method of forming wiring

Semiconductor chip, semiconductor device and methods for producing the same

Electronic component and wire bonding method

Method for manufacturing electronic substrate

Non-pull back pad package with an additional solder standoff

Technique for forming a passivation layer without a terminal metal

Bonding structure and fabrication thereof

High-contrast laser mark on substrate surfaces

Resilient carrier assembly for an integrated circuit

Interconnecting substrates for microelectronic dies, methods for forming vias in such substrates, and methods for packaging microelectronic devices

Low fabrication cost, high performance, high reliability chip scale package

SEMICONDUCTOR PACKAGE MANUFACTURING METHOD AND SEMICONDUCTOR APPARATUS

Solder pillar bumping and a method of making the same

CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF

Packaged microelectronic devices and methods for packaging microelectronic devices

Bonding structure

Semiconductor device and a method of manufacturing the same

Semiconductor device, mounting structure, electro-optical apparatus, electronic system, and method for manufacturing electronic component

METALLIZATION LAYER STACK WITHOUT A TERMINAL ALUMINUM METAL LAYER

Packaging with base layers comprising alloy 42

Multilayer wiring substrate mounted with electronic component and method for manufacturing the same

Flip-Chip Semiconductor Package with Encapsulant Retaining Structure and Strip

Wafer stacked package having vertical heat emission path and method of fabricating the same

Method and apparatus of power ring positioning to minimize crosstalk

Die-up integrated circuit package with grounded stiffener

Bondwire utilized for coulomb counting and safety circuits

Stacked chip package structure with leadframe having inner leads with transfer pad

Semiconductor device and a method of manufacturing the same

CONNECTING A PLURALITY OF BOND PADS AND/OR INNER LEADS WITH A SINGLE BOND WIRE

Stacked chip packaging with heat sink structure

Ball grid array package structure

Semiconductor device, method of manufacturing the same

Semiconductor storage device, semiconductor device, and manufacturing method therefor

Ultra-thin oxide bonding for S1 to S1 dual orientation bonding

Micropad for bonding and a method therefor

Array quad flat no-lead package and method of forming same

Semiconductor integrated circuit and method for manufacturing the same

Method for fabricating a leadframe

Integrated circuit leadless package system

METHOD FOR PRODUCING AN INTEGRATED CIRCUIT INCLUDING A CONNECTION CONTACT ON A SEMICONDUCTOR BODY

Flip chip metallization method and devices

Method for forming conductive layer and substrate having the same, and method for manufacturing semiconductor device

Chip packaging process

Electronic assemblies having a low processing temperature

INTEGRATED CIRCUIT DIE/PACKAGE INTERCONNECT

Manufacturing method of semiconductor chip