209730 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bump connectors; Manufacturing methods related thereto; Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector; Disposition the whole bump connector protruding from the surface
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#2SEMICONDUCTOR STRUCTURE AND METHOD OF MAKING
#3METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE WITH SUBSTRATE FOR ELECTRICAL CONNECTION
#4DIE INTERCONNECT SUBSTRATES, A SEMICONDUCTOR DEVICE AND A METHOD FOR FORMING A DIE INTERCONNECT SUBSTRATE
#5SEMICONDUCTOR PACKAGE WITH AT LEAST ONE PRE-MADE CONDUCTIVE UNIT AND PANEL-LEVEL METHODS OF MAKING THEREOF
#6SCALABLE EMBEDDED SILICON BRIDGE VIA PILLARS IN LITHOGRAPHICALLY DEFINED VIAS, AND METHODS OF MAKING SAME
#7SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING SAME
#8PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
#9ELECTRICAL INTERCONNECT BRIDGE
#10INTEGRATED CIRCUIT (IC) PACKAGE EMPLOYING A METAL BLOCK WITH METAL INTERCONNECTS THERMALLY COUPLING A DIE TO AN INTERPOSER SUBSTRATE FOR DISSIPATING THERMAL ENERGY OF THE DIE, AND RELATED FABRICATION METHODS
#11SYSTEM-IN PACKAGE COMPONENT, ELECTRONIC DEVICE, AND SYSTEM-IN PACKAGE COMPONENT MANUFACTURING METHOD
#12SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
#13ANTENNA DEVICE AND METHOD OF MANUFACTURING ANTENNA DEVICE
#14EMBEDDED TRACE SUBSTRATES (ETSs) WITH T-SHAPED INTERCONNECTS WITH REDUCED-WIDTH EMBEDDED METAL TRACES, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS
#15Selectively Dispensed Underfill and Edge Bond Patterns
#16MEMORY DEVICE AND METHOD OF ASSEMBLING SAME
#17SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
#18Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate
#19Electrical interconnect bridge
#20Stackable via package and method
#21Semiconductor structure
#22SEMICONDUCTOR PACKAGE ASSEMBLY AND ELECTRONIC DEVICE
#23SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#24Semiconductor package structure having an annular frame with truncated corners
#25Semiconductor structure
#26SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
#27Interconnect structure with redundant electrical connectors and associated systems and methods
#28Stackable via package and method
#29Method for manufacturing semiconductor structure
#30Semiconductor structure
#31Semiconductor package structure having an annular frame with truncated corners
#32Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate
#33Semiconductor devices including through-silicon-vias and methods of manufacturing the same and semiconductor packages including the semiconductor devices
#34Scalable embedded silicon bridge via pillars in lithographically defined vias, and methods of making same
#35Semiconductor device and manufacturing method of the same
#36Interconnect structure with redundant electrical connectors and associated systems and methods
#37Semiconductor structure and manufacturing method thereof
#38Semiconductor device comprising semiconductor die and interposer and manufacturing method thereof
#39Image sensor packages and related methods
#40System-in-package with double-sided molding
#41Electrical interconnect bridge
#42Semiconductor die singulation and structures formed thereby
#43Stackable via package and method
#44Chip Packaging Structure and Related Inner Lead Bonding Method
#45System-in-package with double-sided molding
#46Semiconductor device and manufacturing method of the same
#47Semiconductor package and method for fabricating base for semiconductor package
#483D packages and methods for forming the same
#49Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate
#50Semiconductor package structure having an annular frame with truncated corners
#51Integrated circuit package and methods of forming same
#52System on package architecture including structures on die back side
#53Semiconductor device and manufacturing method of the same
#54Trace Design for Bump-on-Trace (BOT) Assembly
#55Electronics package with improved thermal performance
#56Dual-layer dielectric in memory device
#57Semiconductor memory chip, semiconductor memory package, and electronic system using the same
#58High-density chip-to-chip interconnection with silicon bridge
#59Semiconductor package and method for fabricating base for semiconductor package
#60Interconnect structure with redundant electrical connectors and associated systems and methods
#61Semiconductor structure having counductive bump with tapered portions and method of manufacturing the same
#62INTEGRATED CIRCUIT PACKAGE COMPRISING SURFACE CAPACITOR AND GROUND PLANE
#63SEMICONDUCTOR ASSEMBLY WITH THREE DIMENSIONAL INTEGRATION AND METHOD OF MAKING THE SAME
#64Semiconductor device including conductive bump interconnections
#65Semiconductor memory chip, semiconductor memory package, and electronic system using the same
#66Semiconductor packages
#67Semiconductor die singulation and structures formed thereby
#68System on package architecture including structures on die back side
#69Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate
#70System-in-package with double-sided molding
#71Semiconductor device and manufacturing method thereof
#72Semiconductor device and method of forming partition fence and shielding layer around semiconductor components
#73Substrate, semiconductor package structure and manufacturing process
#74Semiconductor devices including through-silicon-vias and methods of manufacturing the same and semiconductor packages including the semiconductor devices
#75Air-cavity package with enhanced package integration level and thermal performance
#76Package substrates, packaged semiconductor devices, and methods of packaging semiconductor devices
#77Air-cavity package with dual signal-transition sides
#78Electronic package assembly with compact die placement
#79Scalable embedded silicon bridge via pillars in lithographically defined vias, and methods of making same
#80Wiring structure, semiconductor package structure and semiconductor process
#81Semiconductor package and method for fabricating base for semiconductor package
#82Solder in cavity interconnection structures
#83PACKAGE STACK STRUCTURE
#84Transient voltage suppressor apparatus
#85Semiconductor device and manufacturing method of the same
#86Selective area heating for 3D chip stack
#87SSI PoP
#88Air-cavity package with two heat dissipation interfaces
#89Semiconductor packages including an adhesive pattern
#90Methods of manufacturing semiconductor packages
#91Air-cavity package with dual signal-transition sides
#92Air-cavity package with enhanced package integration level and thermal performance
#93Semiconductor die singulation and structures formed thereby
#94Interconnect structure with redundant electrical connectors and associated systems and methods
#95Wiring substrate and semiconductor device
#96Porous alumina templates for electronic packages
#97EXPOSED SIDE-WALL AND LGA ASSEMBLY
#98Wiring board including multiple wiring layers
#99Contact area design for solder bonding
#100Board-to-board contactless connectors and methods for the assembly thereof
#101Semiconductor device
#102Method of manufacturing semiconductor device
#103ELECTRICAL INTERCONNECT BRIDGE
#104Electronics package with improved thermal performance
#105Dual-layer dielectric in memory device
#106Semiconductor package, printed circuit board substrate and semiconductor device
#107Wiring board and semiconductor device
#108Wiring board, and semiconductor device
#109Integrated circuit package and methods of forming same
#110Semiconductor packages
#111Interconnect structures with polymer core
#112Laminated semiconductor device and manufacturing method of laminated semiconductor device
#113Porous alumina templates for electronic packages
#114Printed circuit board, semiconductor package including the printed circuit board, and method of manufacturing the printed circuit board
#115Structures and methods for low temperature bonding using nanoparticles
#116Package structure and manufacturing method of package structure
#117Dual-layer dielectric in memory device
#118Trace design for bump-on-trace (BOT) assembly
#119Electronic device, electronic device fabrication method, and electronic apparatus
#120Semiconductor device and semiconductor device manufacturing method
#121Semiconductor package
#122Molded composite enclosure for integrated circuit assembly
#123Semiconductor device having an encapsulated front side and interposer and manufacturing method thereof
#124Devices and methods related to packaging of radio-frequency devices on ceramic substrates
#125Structure for establishing interconnects in packages using thin interposers
#126Semiconductor device with a gap control electrode and method of manufacturing the semiconductor device
#127SEMICONDUCTOR ASSEMBLY WITH THREE DIMENSIONAL INTEGRATION AND METHOD OF MAKING THE SAME
#128THERMALLY ENHANCED SEMICONDUCTOR ASSEMBLY WITH THREE DIMENSIONAL INTEGRATION AND METHOD OF MAKING THE SAME
#129Semiconductor Device and Method of Forming Inverted Pyramid Cavity Semiconductor Package
#130Semiconductor package having a trench penetrating a main body
#131Chip-on-wafer process control monitoring for chip-on-wafer-on-substrate packages
#132Chip-stacked semiconductor package and method of manufacturing the same
#133Integrated circuit package comprising surface capacitor and ground plane
#134IC structure with angled interconnect elements
#135FLEXIBLY-WRAPPED INTEGRATED CIRCUIT DIE
#136Laser marking in packages
#137Reversed build-up substrate for 2.5D
#138Semiconductor device
#139Semiconductor device and manufacturing method of semiconductor device
#140Semiconductor package, printed circuit board substrate and semiconductor device
#141Selective area heating for 3D chip stack
#142SSI PoP
#1432.5D microelectronic assembly and method with circuit structure formed on carrier
#144Selective area heating for 3D chip stack
#145Semiconductor device and manufacturing method thereof
#146Semiconductor device and method of forming a package in-fan out package
#147Radiation detector element
#148Interconnect structure with redundant electrical connectors and associated systems and methods
#149Molded composite enclosure for integrated circuit assembly
#150Semiconductor fingerprint identification sensor and manufacturing method thereof
#151Semiconductor substrate, semiconductor package structure and method of making the same
#152SEMICONDUCTOR PACKAGES
#153Contact area design for solder bonding
#154Semiconductor device
#155Method for through silicon via structure
#156Semiconductor structure having a conductive bump with a plurality of bump segments
#157System and method for an improved fine pitch joint
#158Through silicon vias and thermocompression bonding using inkjet-printed nanoparticles
#159Semiconductor package
#160Embedded package and method thereof
#161Printed circuit board and semiconductor package using the same
#162Semiconductor package and method of fabricating the same
#163Solder balls and semiconductor device employing the same
#164Methods of packaging semiconductor devices and packaged semiconductor devices
#165Interconnect structure with redundant electrical connectors and associated systems and methods
#166SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
#167Semiconductor substrate, semiconductor package structure and method of making the same
#168METHOD OF MANUFACTURING THREE-DIMENSIONAL INTEGRATED CIRCUIT COMPRISING ALUMINUM NITRIDE INTERPOSER
#169Semiconductor package, printed circuit board substrate and semiconductor device
#170Power semiconductor module
#171Embedded package and method thereof
#172Package on package structure with pillar bump pins and related method thereof
#173INTEGRATED CIRCUIT PACKAGING SYSTEM WITH NO-REFLOW CONNECTION AND METHOD OF MANUFACTURE THEREOF
#174ULTRATHIN MICROELECTRONIC DIE PACKAGES AND METHODS OF FABRICATING THE SAME
#175INTEGRATED CIRCUIT CHIP AND DISPLAY APPARATUS
#176Die package comprising die-to-wire connector and a wire-to-die connector configured to couple to a die package
#177Semiconductor interposer and package structure having the same
#178Package structure and its fabrication method
#179Semiconductor Device and Method of Forming Substrate Having Conductive Columns
#180Semiconductor device including a cap facing a semiconductor chip and a bump electrode provided between the semiconductor chip and the cap
#181Semiconductor device having semiconductor chips in resin and electronic circuit device with the semiconductor device
#182Semiconductor device package and method of the same
#183Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package
#184Pressure sensor device with through silicon via
#185Semiconductor package and method for fabricating base for semiconductor package
#1863D packages and methods for forming the same
#187Package substrates, packaged semiconductor devices, and methods of packaging semiconductor devices
#188Method for fabricating equal height metal pillars of different diameters
#189INTEGRATED CIRCUIT PACKAGE
#190Dam for three-dimensional integrated circuit
#191Semiconductor package and method for fabricating base for semiconductor package
#192PACKAGE STRUCTURE
#193Semiconductor device and manufacturing method thereof
#194EMBEDDED SYSTEM IN PACKAGE
#195Wiring substrate and semiconductor device
#196CHIP PACKAGE STRUCTURE
#197Interposer package-on-package structure
#198Packages and methods for forming the same
#199Integrated passive flip chip package
#200Laser marking in packages
#201JOINING A CHIP TO A SUBSTRATE WITH SOLDER ALLOYS HAVING DIFFERENT REFLOW TEMPERATURES
#202Microelectronic packages with nanoparticle joining
#203Selective area heating for 3D chip stack
#204Semiconductor device having chip embedded in heat spreader and electrically connected to interposer and method of manufacturing the same
#205Semiconductor device and semiconductor device manufacturing method
#206Accessing or interconnecting integrated circuits
#207SEMICONDUCTOR PACKAGE HAVING A DISSIPATING PLATE
#208SEMICONDUCTOR PACKAGE
#209Pad-less interconnect for electrical coreless substrate
#210Semiconductor device and manufacturing method thereof
#211Microelectronic assembly having a heat spreader for a plurality of die
#212CHIP STACK, SEMICONDUCTOR DEVICES HAVING THE SAME, AND MANUFACTURING METHODS FOR CHIP STACK
#213Structure and formation method of chip package structure
#214Flexibly-wrapped integrated circuit die
#215Semiconductor device with semiconductor chip and wiring layers
#216Contact bump connection and contact bump and method for producing a contact bump connection
#217Integrated circuit package and methods of forming same
#218Flip-chip package structure and method for an integrated switching power supply
#219SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME
#220THERMAL IMPROVEMENT FOR HOTSPOTS ON DIES IN INTEGRATED CIRCUIT PACKAGES
#221Attaching passive components to a semiconductor package
#222Double solder bumps on substrates for low temperature flip chip bonding
#223SOLDER PILLARS FOR EMBEDDING SEMICONDUCTOR DIE
#224Chip stack with electrically insulating walls
#225Solder in cavity interconnection structures
#226Method of manufacturing semiconductor device and semiconductor device
#227Trace Design for Bump-on-Trace (BOT) Assembly
#228IC package with metal interconnect structure implemented between metal layers of die and interposer
#229Low profile semiconductor module with metal film support
#230Low z-height package assembly
#231Die-die stacking structure and method for making the same
#232Package for environmental parameter sensors and method for manufacturing a package for environmental parameter sensors
#233CHIP ELEMENT AND CHIP PACKAGE
#234Bump structures for semiconductor package
#235Formation of alpha particle shields in chip packaging
#236Interconnect structures with polymer core
#237Intermetallic compound layer on a pillar between a chip and substrate
#238Electrical connector
#239Semiconductor package
#240Semiconductor device and manufacturing method thereof
#241REACTIVE BONDING OF A FLIP CHIP PACKAGE
#242Through silicon via structure
#243Through silicon via bonding structure
#244LEAD FRAME PACKAGE AND MANUFACTURING METHOD THEREOF
#245PRINTED CIRCUIT BOARD USING SOLDER COATING BALL
#246Method and encapsulant for flip-chip assembly
#247Wiring substrate, method of manufacturing the same, and semiconductor device
#248Package on-package process for applying molding compound
#249SYSTEMS AND METHODS FOR VOID REDUCTION IN A SOLDER JOINT
#250Semiconductor device and method of making bumpless flipchip interconnect structures
#251Contact bumps methods of making contact bumps
#252Double solder bumps on substrates for low temperature flip chip bonding
#253Bump structures for semiconductor package
#254Reactive bonding of a flip chip package
#255Electronic components assembly
#256Semiconductor package
#257Packages and methods for forming the same
#258Wiring substrate, method of manufacturing the same, and semiconductor device
#259SEMICONDUCTOR PACKAGE
#260Method for producing a protective structure
#261Package-on-package process for applying molding compound
#262Formation of alpha particle shields in chip packaging
#263Solder in cavity interconnection structures
#264Vertical ballast technology for power HBT device
#265Accessing or interconnecting integrated circuits
#266Microelectronic packages with nanoparticle joining
#267Attaching passive components to a semiconductor package
#268Standing chip scale package
#269Accessing or interconnecting integrated circuits
#270Through silicon via bonding structure
#271Standing chip scale package
#272Processes of making pad-less interconnect for electrical coreless substrate
#273Formation of alpha particle shields in chip packaging
#274Thermal improvement for hotspots on dies in integrated circuit packages
#275Alpha particle shields in chip packaging
#276Stackable via package and method
#277Stackable via package and method
#278Stackable via package and method
#279Joint structure for metal pillars
#280Wafer level package and fabrication method thereof
#281Integrated circuit packaging system with surface treatment and method of manufacture thereof
#282Stackable via package and method
#283Method and apparatus for tracking interposer dies in a silicon stacked interconnect technology (SSIT) product