ClassID:

209731

H01L2224/1613 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bump connectors; Manufacturing methods related thereto; Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector; Disposition the bump connector connecting within a semiconductor or solid-state body, i.e. connecting two bonding areas on the same semiconductor or solid-state body

Recent Application in this class:
#1
20250364506
2025-11-27

SEMICONDUCTOR DEVICE

#2
20250286016
2025-09-11

INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAME

#3
20240395763
2024-11-28

SEMICONDUCTOR STRUCTURE AND METHOD FOR ARRANGING REDISTRIBUTION LAYER OF SEMICONDUCTOR DEVICE

#4
20240395762
2024-11-28

SEMICONDUCTOR STRUCTURE AND METHOD FOR ARRANGING REDISTRIBUTION LAYER OF SEMICONDUCTOR DEVICE

#5
20230282614
2023-09-07

Method of forming an integrated circuit package having a padding layer on a carrier

#6
20180053699
2018-02-22

Integrated circuit die having a split solder pad

#7
20170365551
2017-12-21

Method of producing a semiconductor device with through-substrate via covered by a solder ball

#8
20170243860
2017-08-24

Display apparatus including a micro light-emitting diode

#9
20170025351
2017-01-26

Semiconductor device with through-substrate via covered by a solder ball

#10
20170018518
2017-01-19

Method of producing a semiconductor device with through-substrate via covered by a solder ball

#11
20160013121
2016-01-14

Bumps bonds formed as metal line interconnects in a semiconductor device

#12
20150048513
2015-02-19

Method for obtaining three-dimensional actin structures and uses thereof

#13
20140361429
2014-12-11

Semiconductor device with bumps and display device module incorporating the same

#14
20140339698
2014-11-20

Semiconductor device with through-substrate via covered by a solder ball and related method of production

#15
20130313705
2013-11-28

Implementing decoupling devices inside a TSV DRAM stack

#16
20120306085
2012-12-06

Protective layer for protecting TSV tips during thermo-compressive bonding

#17
20110140730
2011-06-16

DETECTION CIRCUITRY FOR DETECTING BONDING CONDITIONS ON BOND PADS

#18
20110122592
2011-05-26

First-level interconnects with slender columns, and processes of forming same

#19
20100105200
2010-04-29

Semiconductor package with passivation island for reducing stress on solder bumps

#20
20090283867
2009-11-19

Integration structure of semiconductor circuit and microprobe sensing elements and method for fabricating the same

#21
20090079070
2009-03-26

Semiconductor package with passivation island for reducing stress on solder bumps

#22
20080079173
2008-04-03

Integrated circuit package system with pad to pad bonding

#23
20070262446
2007-11-15

Stacked bump structure and manufacturing method thereof

#24
20060208041
2006-09-21

Forming solder balls on substrates

#25
20060121650
2006-06-08

Method and apparatus for circuit completion through the use of ball bonds or other connections during the formation of a semiconductor device

#26
20050110139
2005-05-26

Customized microelectronic device and method for making customized electrical interconnections