209742 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bump connectors; Manufacturing methods related thereto; Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors Disposition
Sub-classes:Semiconductor Packages and Methods of Forming Same
#2ALTERNATIVE SURFACES FOR CONDUCTIVE PAD LAYERS OF SILICON BRIDGES FOR SEMICONDUCTOR PACKAGES
#3METAL-FREE FRAME DESIGN FOR SILICON BRIDGES FOR SEMICONDUCTOR PACKAGES
#4BRIDGE INTERCONNECTION WITH LAYERED INTERCONNECT STRUCTURES
#5Alternative surfaces for conductive pad layers of silicon bridges for semiconductor packages
#6Bridge interconnection with layered interconnect structures
#7Metal-free frame design for silicon bridges for semiconductor packages
#8Metal-free frame design for silicon bridges for semiconductor packages
#9Semiconductor package including a plurality of semiconductor chips
#10Semiconductor packages and methods of forming same
#11Vertical inductor for WLCSP
#12Bridge interconnection with layered interconnect structures
#13Metal-free frame design for silicon bridges for semiconductor packages
#14Packaged die stacks with stacked capacitors and methods of assembling same
#15Vertical inductor for WLCSP
#16Semiconductor packages and methods of forming same
#17Aligned core balls for interconnect joint stability
#18Bonded structures for package and substrate
#19Bridge interconnection with layered interconnect structures
#20Metal-free frame design for silicon bridges for semiconductor packages
#21Semiconductor devices with underfill control features, and associated systems and methods
#22Package structure and method of fabricating the same
#23Semiconductor packages and methods of forming same
#24Semiconductor package including multiple semiconductor chips and method of manufacturing the semiconductor package
#25Component with geometrically adapted contact structure and method for producing the same
#26Land grid array package extension
#27Integrated circuit device, oscillator, electronic device, and vehicle
#28Vertical inductor for WLCSP
#29Stacked radio frequency devices
#30Alternative surfaces for conductive pad layers of silicon bridges for semiconductor packages
#31Semiconductor device package having a mounting plate with protrusions exposed from a resin material
#32Bridge interconnection with layered interconnect structures
#33Optoelectronic device module having a silicon interposer
#34Packaged die stacks with stacked capacitors and methods of assembling same
#35Electronic component package
#36Semiconductor device and manufacturing method thereof
#37Land grid array package extension
#38Semiconductor devices with underfill control features, and associated systems and methods
#39Electronic component package
#40Bumped land grid array
#41Electronic component package
#42Bonded structures for package and substrate
#43Semiconductor chip having a dense arrangement of contact terminals
#44Bonded structures for package and substrate
#45Stacked package configurations and methods of making the same
#46Radiation detector element
#47Bonded structures for package and substrate
#48Bridge interconnection with layered interconnect structures
#49Integrated device comprising high density interconnects in inorganic layers and redistribution layers in organic layers
#50Managing parasitic capacitance and voltage handling of stacked radio frequency devices
#51Formation of through-silicon via (TSV) in silicon substrate
#52Semiconductor device including asymmetric electrode arrangement
#53Electronic device and method of manufacturing electronic device
#54Chip interposer, semiconductor device, and method for manufacturing a semiconductor device
#55Bonded structures for package and substrate
#56Formation of through-silicon via (TSV) in silicon substrate
#57FORMATION OF THROUGH-SILICON VIA (TSV) IN SILICON SUBSTRATE
#58Semiconductor device and method of forming overlapping semiconductor die with coplanar vertical interconnect structure
#59ELECTRONIC DEVICE, CIRCUIT BOARD, AND MANUFACTURING METHOD OF ELECTRONIC DEVICE
#60STACK PACKAGE
#61Wiring board, semiconductor device and method for manufacturing the same
#62Semiconductor device and method of forming overlapping semiconductor die with coplanar vertical interconnect structure
#63Mounted body and method for manufacturing the same
#64Semiconductor device having an increased area of one of the opposing electrode parts for preventing generation of unconnected positions the electrodes on the bonded wafers
#65Semiconductor package and multi-chip semiconductor package using the same
#66Mounted body and method for manufacturing the same
#67Chip package for image sensor and method of manufacturing the same
#68Method for fabricating resin-molded semiconductor device having posts with bumps
#69Semiconductor device with surface-mountable external contacts and method for manufacturing the same
#70Microelectronic connection component
#71System having semiconductor component with multiple stacked dice
#72Interconnection structure through passive component
#73Semiconductor device and method of manufacturing the same
#74Semiconductor component having multiple stacked dice
#75Resin-molded semiconductor device having posts with bumps and method for fabricating the same
#76Microelectronic assembly having array including passive elements and interconnects
#77Method of fabricating an electronic device