Semiconductor device having through-silicon-via and methods of forming the same

Conductive line system and process

Semiconductor assembly and method to form the same

Electronic device and method for production

Electronic device with interconnection structure oblate ellipsoid-shaped aperture

Metal bond pad with cobalt interconnect layer and solder thereon

Fan-out interconnect structure and method for forming same

Semiconductor device and method of manufacturing the same

Staged via formation from both sides of chip

Low profile IC package

Semiconductor Package with Embedded Die

Semiconductor device and manufacturing method

Apparatus and method for self-aligning chip placement and leveling

Methods and devices for fabricating and assembling printable semiconductor elements

Apparatus, system, and method for collecting a target material

Interposer for hermetic sealing of sensor chips and for their integration with integrated circuit chips

MEMS chip and method of manufacturing a MEMS chip

Tunable composite interposer

Packaging devices and methods of manufacture thereof

Semiconductor device and method of forming stacked vias within interconnect structure for FO-WLCSP

Testing of semiconductor chips with microbumps

Method of manufacturing connector structures of integrated circuits

Alignment structures and methods of forming same

Methods for forming pillar bumps on semiconductor wafers

Semiconductor device and method of manufacturing the same

Method of forming redistribution layer

Semiconductor device

Pad structure exposed in an opening through multiple dielectric layers in BSI image sensor chips

Scalable package architecture and associated techniques and configurations

Fully molded peripheral package on package device

Interfacial alloy layer for improving electromigration (EM) resistance in solder joints

Source down semiconductor devices and methods of formation thereof

Method for package-on-package assembly with wire bonds to encapsulation surface

Semiconductor device for preventing crack in pad region and fabricating method thereof

Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices

Packaging devices and methods of manufacture thereof

Semiconductor package and manufacturing method thereof

Method of manufacturing semiconductor device and semiconductor device

Chip-on-wafer package and method of forming same

Integrated WLUF and SOD process

Method for fabricating package structure

MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICES

Capacitor in post-passivation structures and methods of forming the same

Reduced volume interconnect for three-dimensional chip stack

PACKAGED SEMICONDUCTOR DEVICES

Semiconductor Device and Method of Manufacturing the Same

Packaging process of electronic component

Devices and methods related to electrostatic discharge protection benign to radio-frequency operation

Semiconductor device and manufacturing method of same

Method of manufacturing a semiconductor device having scribe lines

Semiconductor device

METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE

Semiconductor packages and methods of forming the same

Semiconductor packaging structure having stacked seed layers

ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME

Reliable interconnect

Methods of forming conductive materials on semiconductor devices, and methods of forming electrical interconnects

Electrode connection structure and electrode connection method

Semiconductor device, integrated circuit structure using the same, and manufacturing method thereof

Repackaged integrated circuit and assembly method

Semiconductor package and method of fabricating the same

Bonding pad surface damage reduction in a formation of digital pattern generator

Image sensor packages and methods of fabricating the same

Offset interposers for large-bottom packages and large-die package-on-package structures

High speed, high density, low power die interconnect system

Post-passivation interconnect structure and method of forming same

Methods of forming semiconductor packages with an intermetallic layer comprising tin and at least one of silver, copper or nickel

Semiconductor device

Semiconductor packaging and manufacturing method thereof

Manufacturing method of ultra-thin semiconductor device package assembly

Package having substrate with embedded metal trace overlapped by landing pad

Bump structures, semiconductor device and semiconductor device package having the same

Manufacturing method of interconnect structure

Chip module and method for forming the same

Multilayer structure for a semiconductor device and a method of forming a multilayer structure for a semiconductor device

Connection pads for a fingerprint sensing device

Integrated circuit structure having dies with connectors

Semiconductor chip and method of processing a semiconductor chip

Metal etchant compositions and methods of fabricating a semiconductor device using the same

MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

Hybrid bonding with air-gap structure

Semiconductor device with redistribution layers on partial encapsulation and non-photosensitive passivation layers

Semiconductor device

Wafer to wafer bonding process and structures

Semiconductor structure and method of fabricating the same

Semiconductor structure with UBM layer and method of fabricating the same

Reducing solder pad topology differences by planarization

Wafer structure and method for wafer dicing

Semiconductor device and its manufacturing method

Method for preventing die pad delamination

Environmental hardened packaged integrated circuit

Method for through silicon via structure

Semiconductor device having connection terminal of solder

Method and structure for wafer-level packaging

Integrated device package comprising photo sensitive fill between a substrate and a die

Integrated circuits with backside metalization and production method thereof

Air trench in packages incorporating hybrid bonding

Method of packaging integrated circuits

Semiconductor device and manufacturing method for the same

Semiconductor substrate and manufacturing method thereof

Package structure and manufacturing method thereof

Visibility event navigation method and system

Semiconductor device and an electronic device

Method of multi-chip wafer level packaging

Stacked semicondcutor structure and method

Semiconductor devices having stacked structures and methods for fabricating the same

Package substrate, semiconductor package and method of manufacturing the same

Semiconductor device having conductive bumps of varying heights

Semiconductor devices having a TSV, a front-side bumping pad, and a back-side bumping pad

Semiconductor Package and Method of Fabrication Thereof

Apparatus, system, and method for collecting a target material

Bonding pad on a back side illuminated image sensor

Methods of forming stacked microelectronic dice embedded in a microelectronic substrate

Semiconductor device and manufacturing method thereof

Semiconductor device with a wire bonding and a sintered region, and manufacturing process thereof

Method for wafer level packaging

Semiconductor structure having a conductive bump with a plurality of bump segments

Device package with reduced thickness and method for forming same

Bond Pad Having Ruthenium Covering Passivation Sidewall

FIRST-PACKAGED AND LATER-ETCHED THREE-DIMENSIONAL FLIP-CHIP SYSTEM-IN-PACKAGE STRUCTURE AND PROCESSING METHOD THEREFOR

Semiconductor device and method of manufacturing the same

Method for manufacturing semiconductor device with metal-containing film layer at bonding surface thereof

Ball amount process in the manufacturing of integrated circuit

Method of forming a bondpad and bondpad

Chip package and method for forming the same

Semiconductor device and manufacturing method thereof

Automated optical inspection of unit specific patterning

Method for processing a semiconductor substrate and a method for processing a semiconductor wafer

Semiconductor device and method of forming the same

Semiconductor device and manufacturing method for the same

Method of manufacturing a semiconductor device and interconnection structures thereof

Chip package and manufacturing method thereof

Chip using triple pad configuration and packaging method thereof

Semiconductor device having a porous metal layer and an electronic device having the same

OFFSET INTERPOSERS FOR LARGE-BOTTOM PACKAGES AND LARGE-DIE PACKAGE-ON-PACKAGE STRUCTURES

Semiconductor bonding with compliant resin and utilizing hydrogen implantation for transfer-wafer removal

Method of manufacturing semiconductor device

System and method for an improved interconnect structure

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME

Bond pad structure with dual passivation layers

High density fan out package structure

Method of making a semiconductor device having a functional capping

Interconnect structures and methods of forming same

Interconnect structure and method of forming same

Planar passivation for pads

Interconnect crack arrestor structure and methods

Method of forming metal pads with openings in integrated circuits including forming a polymer plug extending into a metal pad

Method of fabricating semiconductor package having an interposer structure

Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect

Bond pad structure for low temperature flip chip bonding

Semiconductor package structure and manufacturing method thereof

Method of using aluminum layer as etching stop layer for patterning a platinum layer

Electrical connections for chip scale packaging

Electronic device with first and second contact pads and related methods

Embedding thin chips in polymer

Bonding process for a chip bonding to a thin film substrate

Improving the strength of micro-bump joints

Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die

Power overlay structure having wirebonds and method of manufacturing same

Using interrupted through-silicon-vias in integrated circuits adapted for stacking

Integrated circuit packaging system with under bump metallization and method of manufacture thereof

Semiconductor structure with oval shaped conductor

Electronic devices with semiconductor die coupled to a thermally conductive substrate

Chip package and method for forming the same

Semiconductor structure and fabrication method thereof

Multi-die package with bridge layer and method for making the same

Thermocompression for semiconductor chip assembly

Fan out package structure and methods of forming

SEMICONDUCTOR DEVICE WITH A THROUGH ELECTRODE

Semiconductor device and method comprising redistribution layers

Integration of backside heat spreader for thermal management

Semiconductor device and method of manufacturing the same

Metal to metal bonding for stacked (3D) integrated circuits

Metal to metal bonding for stacked (3D) integrated circuits

Metal to metal bonding for stacked (3D) integrated circuits

Metal to metal bonding for stacked (3D) integrated circuits

Semiconductor device and a method of manufacturing the same

Semiconductor package structure with polymeric layer and manufacturing method thereof

Semiconductor devices and methods of manufacture thereof

Integrated circuit packages and methods for forming the same

Semiconductor device and method of adaptive patterning for panelized packaging

Semiconductor package having stacked chips and a heat dissipation part and method of fabricating the same

Semiconductor device and a method of manufacturing the same

Package with UBM and methods of forming

Package with UBM and methods of forming

Semiconductor package structure and method of fabricating the same

Contact pad for semiconductor devices

Substrate structure and method of manufacturing the same

Method of protecting a mounting tape during laser singulation of a wafer

Manufacturing method of power MOSFET using a hard mask as a CMP stop layer between sequential CMP steps

Fan-out wafer level packages having preformed embedded ground plane connections and methods for the fabrication thereof

Packages and methods of forming packages

Method for bonding metallic contact areas with solution of a sacrificial layer applied on one of the contact areas

Substrateless integrated circuit packages and methods of forming same

Preform structure for soldering a semiconductor chip arrangement, a method for forming a preform structure for a semiconductor chip arrangement, and a method for soldering a semiconductor chip arrangement

Scheme for connector site spacing and resulting structures

Template and pattern forming method

Stack structures in electronic devices including passivation layers for distributing compressive force

Word line hook up with protected air gap

Semiconductor device and its manufacturing method

Manufacturing method for semiconductor devices

Semiconductor package and method of forming the same

Microelectronic packages having texturized solder pads and methods for the fabrication thereof

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Semiconductor device and structure therefor

Semiconductor manufacturing for forming bond pads and seal rings

Method and structure for wafer level packaging with large contact area

Light-emitting device comprising active nanowires and contact nanowires and method of fabrication

Electrical interconnect structure for an embedded semiconductor device package and method of manufacturing thereof

Method of manufacturing semiconductor device

Wafer with liquid molding compound and post-passivation interconnect

Semiconductor package

TSV formation

Etching agent for copper or copper alloy

Multiple bond via arrays of different wire heights on a same substrate

Method for fabricating package structure

Interconnect structure comprising fine pitch backside metal redistribution lines combined with vias

Preventing misshaped solder balls

Pad structure of a semiconductor device, method of manufacturing the pad structure and semiconductor package including the pad structure

Semiconductor packaging structure and forming method therefor

Etching liquid, etching method, and method of manufacturing solder bump

Method for forming interconnect structure

Common drain semiconductor device structure and method

Stacked structure of semiconductor chips having via holes and metal bumps

Semiconductor TSV device package for circuit board connection

Tin alloy electroplating solution for solder bumps including perfluoroalkyl surfactant

Bump pad structure

Semiconductor device

Source down semiconductor devices and methods of formation thereof

Method for forming package systems having interposers

Semiconductor laser mounting with intact diffusion barrier layer

Array substrate, method for fabricating the same and display device

Electrical connector between die pad and z-interconnect for stacked die assemblies

Semiconductor device

Memory device structure

Semiconductor chip and method for forming a chip pad

Semiconductor structure with an interconnect level having a conductive pad and metallic structure such as a base of a crackstop

Wafer level flat no-lead semiconductor packages and methods of manufacture

Schottky Diode and Method of Manufacturing the Same

Semiconductor devices having through electrodes, methods of fabricating the same, electronic systems including the same, and memory cards including same

Method of making bond pad

Wire bond mold lock method and structure

Semiconductor device and manufacturing method thereof

Substrate interconnections having different sizes

Integrated fan-out package structures with recesses in molding compound

Pad design for reliability enhancement in packages

Semiconductor device and method of manufacturing the same

Integrated system and method of making the integrated system

Semiconductor devices having through electrodes, methods of manufacturing the same, and semiconductor packages including the same

Semiconductor device with metal film and method for manufacturing semiconductor device with metal film

Fan-out package and methods of forming thereof

Semiconductor device

Electronic component and method for dissipating heat from a semiconductor die

Method of forming semiconductor device having a conductive via structure

Packaging structural member

Semiconductor device and manufacturing method

Stacked IC control through the use of homogenous region

Multiple bond via arrays of different wire heights on a same substrate

WAFER PACKAGING STRUCTURE AND PACKAGING METHOD

Semiconductor device and method for manufacturing the semiconductor device

Semiconductor chip and method of manufacturing the same

Conductor structure for three-dimensional semiconductor device

Semiconductor device and method of forming conductive vias by backside via reveal with CMP

Method of manufacturing semiconductor package including forming a recessed region in a substrate

System-in-packages having vertically-interconnected leaded components and methods for the fabrication thereof

PACKAGE STRUCTURE

Semiconductor device and method of adaptive patterning for panelized packaging with dynamic via clipping

Micro-pillar assisted semiconductor bonding

Hybrid bonding with air-gap structure

Integrated circuit having electromagnetic shielding capability and manufacturing method thereof

3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach

FAN OUT WAFER LEVEL PACKAGE USING SILICON BRIDGE

Direct die solder of gallium arsenide integrated circuit dies and methods of manufacturing gallium arsenide wafers

Methods of packaging semiconductor devices and structures thereof

Method for building up a fan-out RDL structure with fine pitch line-width and line-spacing

Conductive line system and process

Testing of semiconductor chips with microbumps

Semiconductor device and manufacturing method therefor

SEMICONDUCTOR CHIP, SEMICONDUCTOR PACKAGE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME

Hybrid bonding mechanisms for semiconductor wafers

3D packages and methods for forming the same

Method of making integrated circuit

Radiation hardened by design digital input/output circuits and related methods

Conductive pad structure and method of fabricating the same

Process for forming package-on-package structures

Semiconductor devices and methods of manufacture thereof

Method of forming a semiconductor component comprising a second passivation layer having a first opening exposing a bond pad and a plurality of second openings exposing a top surface of an underlying first passivation layer

Processing of thick metal pads

Contact pad for semiconductor device

Microelectronic packages having sidewall-deposited heat spreader structures and methods for the fabrication thereof

METHOD OF MANUFACTURING A MICRO-FABRICATED WAFER LEVEL INTEGRATED INDUCTOR OR TRANSFORMER FOR HIGH FREQUENCY SWITCH MODE POWER SUPPLIES

Package systems

CONDUCTOR DESIGN FOR INTEGRATED MAGNETIC DEVICES

Methods of fabricating semiconductor chip solder structures

Semiconductor device

Semiconductor structure having recess and manufacturing method thereof

Methods of forming semiconductor device assemblies and interconnect structures, and related semiconductor device assemblies and interconnect structures

GaN power device with solderable back metal

PACKAGE SUBSTRATE AND METHOD FOR FABRICATING THE SAME

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME