Carrier, semiconductor package and fabrication method thereof

Chip package and method for forming the same

Method of manufacturing chip-stacked semiconductor package

Advanced device assembly structures and methods

Semiconductor package and method for fabricating base for semiconductor package

Power semiconductor devices

Test structures for post-passivation interconnect

Semiconductor device

Semiconductor device

Device comprising a ductile layer and method of making the same

Bond pad configurations for controlling semiconductor chip package interactions

INTERCONNECT ASSEMBLIES AND METHODS OF MAKING AND USING SAME

Semiconductor packages and methods of fabrication thereof

Integration of chips and silicon-based trench capacitors using low parasitic silicon-level connections

Method for producing a structure for microelectronic device assembly

Semiconductor device and method for producing the same

Semiconductor device

Semiconductor device assembly including a chip carrier, semiconductor wafer and method of manufacturing a semiconductor device

Organic thin film passivation of metal interconnections

Chip arrangements and methods for manufacturing a chip arrangement

Semiconductor device and method for producing the same

Solder, solder joint structure and method of forming solder joint structure

Semiconductor packaging containing sintering die-attach material

Interconnection structure of package structure and method of forming the same

Semiconductor device and manufacturing method thereof

Semiconductor apparatus, electronic device, and method of manufacturing semiconductor apparatus

Interconnection structure having a via structure

Semiconductor device having conductive pads and a method of manufacturing the same

Plasma treatment for semiconductor devices

Semiconductor device, semiconductor integrated circuit device, and electronic device

Solder fatigue arrest for wafer level package

Metal pad structure over TSV to reduce shorting of upper metal layer

Packaged nano-structured component and method of making a packaged nano-structured component

Expanded semiconductor chip and semiconductor device

Semiconductor package having unified semiconductor chips

Method and structure of forming backside through silicon via connections

Enhanced capture pads for through semiconductor vias

Semiconductor device

Flexible routing for chip on board applications

Semiconductor device and fabrication method

Semiconductor packaging structure and method for forming the same

Semiconductor IC packaging methods and structures

Semiconductor device with conductive vias

Semiconductor packaging structure and method

Die seal ring for integrated circuit system with stacked device wafers

Through-substrate via shielding

Hybrid bonding mechanisms for semiconductor wafers

Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip

Interconnection structure

Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices

Bump interconnection techniques

Glass carrier with embedded semiconductor device and metal layers on the top surface

Semiconductor bonding structure and process

Bond pad structure and method of manufacturing the same

Electrical connection for chip scale packaging

Al bond pad clean method

Active area bonding compatible high current structures

Semiconductor device and method for manufacturing thereof

TSV formation

Semiconductor device and method of making TSV interconnect structures using encapsulant for structural support

Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate

Embedding thin chips in polymer

Strong, heat stable junction

Wire bondable surface for microelectronic devices

Metal bump joint structure

SEMICONDUCTOR DEVICES AND PROCESSING METHODS

Routing layer for mitigating stress in a semiconductor die

Packaging devices, methods of manufacture thereof, and packaging methods

Semiconductor device, imaging device, method of inspecting semiconductor substrate, and method of fabricating semiconductor device

Power module and method of manufacturing the power module

Semiconductor wafer and method for manufacturing semiconductor device

Semiconductor device

Semiconductor package with bonding wires of reduced loop inductance

Nitride semiconductor device

Stub minimization for assemblies without wirebonds to package substrate

Chip-level humidity protection

Semiconductor device and method of forming a PoP device with embedded vertical interconnect units

Devices, systems, and methods related to forming through-substrate vias with sacrificial plugs

Semiconductor device

Microelectronic assembly with impedance controlled wirebond and conductive reference element

Bonding of substrates including metal-dielectric patterns with metal raised above dielectric and structures so formed

Two-sided-access extended wafer-level ball grid array (eWLB) package, assembly and method

Semiconductor device in which internal stress in a layer is relaxed to suppress warping

Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same

Manufacturing method of semiconductor apparatus

Transistor formation using cold welding

Localized high density substrate routing

Three dimensional integrated circuits stacking approach

Apparatus and method for a component package

Semiconductor device

Semiconductor device comprising a crack stop structure

IC wafer having electromagnetic shielding effects and method for making the same

Chip package and method of manufacturing the same

Solid-state image pickup element and solid-state image pickup element mounting structure

Semiconductor apparatus

Transistor formation using cold welding

Pad structure

Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same

Semiconductor devices and methods of fabricating the same

Multiple die packaging interposer structure and method

Bump structures having an extension

Direct multiple substrate die assembly

Thermal dissipation through seal rings in 3DIC structure

Semiconductor device with dummy metal protective structure around semiconductor die for localized planarization of insulating layer

Semiconductor devices having back side bonding structures

Integrated circuit, a chip package and a method for manufacturing an integrated circuit

Through via structure and method

Post passivation interconnect structures and methods for forming the same

Microelectronic packages with nanoparticle joining

Semiconductor device with protective layer over exposed surfaces of semiconductor die

Interconnect assemblies with probed bond pads

Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer

Plating structure for wafer level packages

Extrusion-resistant solder interconnect structures and methods of forming

Flip-chip package structure and method for an integrated switching power supply

Semiconductor memory card

Methods for manufacturing a chip arrangement, methods for manufacturing a chip package, a chip package and chip arrangements

Bondable top metal contacts for gallium nitride power devices

Latch-up suppression and substrate noise coupling reduction through a substrate back-tie for 3D integrated circuits

Semiconductor device with pre-molding chip bonding

Identification mechanism for semiconductor device die

Latch-up suppression and substrate noise coupling reduction through a substrate back-tie for 3D integrated circuits

Semiconductor device and method of manufacturing the same

Latch-up suppression and substrate noise coupling reduction through a substrate back-tie for 3D integrated circuits

Wire bond splash containment

SEMICONDUCTOR DEVICE STRUCTURES AND METHODS FOR COPPER BOND PADS

Semiconductor package with improved redistribution layer design and fabricating method thereof

Metal pads with openings in integrated circuits

Bump structures for semiconductor package

Interfacial alloy layer for improving electromigration (EM) resistance in solder joints

Nonvolatile semiconductor memory device

Chip package and a method for manufacturing a chip package

Method and apparatus for routing die signals using external interconnects

Lead-free solder ball

Methods and apparatus of packaging semiconductor devices

METHOD FOR MAKING A DOUBLE-SIDED FANOUT SEMICONDUCTOR PACKAGE WITH EMBEDDED SURFACE MOUNT DEVICES, AND PRODUCT MADE

Electronic device

Method for manufacturing a metal pad structure of a die, a method for manufacturing a bond pad of a chip, a die arrangement and a chip arrangement

Chip package

Copper ball bond features and structure

Semiconductor device having a copper plug

Semiconductor device with copper wirebond sites and methods of making same

Devices for metallization

Semiconductor packages including through electrodes and methods of manufacturing the same

Terminal structure, and semiconductor element and module substrate comprising the same

Terminal structure, and semiconductor element and module substrate comprising the same

Terminal structure and semiconductor device

Terminal structure and semiconductor device

Semiconductor package having protective layer with curved surface and method of manufacturing same

Semiconductor device and electronic device

Miniature passive structures for ESD protection and input and output matching

Pad sidewall spacers and method of making pad sidewall spacers

Mounted structure

Contact pads with sidewall spacers and method of making contact pads with sidewall spacers

Conductive lines and pads and method of manufacturing thereof

High temperature interconnect assemblies for high temperature electronics utilizing transition pads

Integrated circuit device

Semiconductor package having a recess filled with a molding compound

Semiconductor device and method of manufacturing the same

METHOD FOR FABRICATING LIGHT EMITTING DIODE (LED) DICE USING BOND PAD DAM AND WAVELENGTH CONVERSION LAYERS

Waterproof structure of pad, waterproof pad, and method for forming waterproof structure

Method of making a semiconductor device having a post-passivation interconnect structure

Method for packaging circuits

Interposer system and method

Semiconductor devices including a non-planar conductive pattern, and methods of forming semiconductor devices including a non-planar conductive pattern

Controlled collapse chip connection (C4) structure and methods of forming

Package on package devices and methods of forming same

Semiconductor structures comprising a dielectric material having a curvilinear profile

Semiconductor device and method of manufacturing the same

Electronic device and method of fabricating an electronic device

Semiconductor device including a trench in a semiconductor substrate and method of manufacturing a semiconductor device

Nitride semiconductor light emitting chip, and nitride semiconductor light emitting device

FLAT DAM AND METHOD FOR MANUFACTURING CHIP PACKAGE USING THE SAME

Integrated system and method of making the integrated system

BVA interposer

Chip package and a method for manufacturing a chip package

Reconstituted wafer-level package DRAM

Metal cored solder decal structure and process

Dense interconnect with solder cap (DISC) formation with laser ablation and resulting semiconductor structures and packages

Semiconductor devices having stacked solder bumps with intervening metal layers to provide electrical interconnections

Method of fabricating a chip package

Method and structure of forming backside through silicon via connections

Semiconductor device and method of manufacturing the same

Production of adhesion structures in dielectric layers using photoprocess technology and devices incorporating adhesion structures

Electric device package comprising a laminate and method of making an electric device package comprising a laminate

Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate

Monolithic bidirectional silicon carbide switching devices

Vertically integrated systems

Semiconductor device and manufacturing method of same

Solder volume compensation with C4 process

Redistribution layer (RDL) with variable offset bumps

Wafer-level device packaging

GaN power device with solderable back metal

Backside processing of semiconductor devices

Stacked fan-out semiconductor chip

SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE USING THE SAME

Semiconductor package and method of fabricating the same

Pillar on pad interconnect structures, semiconductor dice and die assemblies including such interconnect structures, and related methods

Method of forming post passivation interconnects

Chip package comprising alignment mark and method for forming the same

Three-dimensional integrated structure capable of detecting a temperature rise

Methods for producing a bond and a semiconductor module

Hybrid bonding systems and methods for semiconductor wafers

Methods for receiving and transmitting voltage through the use of supply voltage or ground connections including bond pad interconnects for integrated circuit devices

Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure

Non-circular under bump metallization (UBM) structure, orientation of non-circular UBM structure and trace orientation to inhibit peeling and/or cracking

Electronic device mounted on a substrate

3DIC stacking device and method of manufacture

Electronic component and method of manufacturing electronic component

Method for manufacturing a chip package

Integrated WLUF and SOD process

Package-in-packages and methods of formation thereof

Multiple die packaging interposer structure and method

Insulated gate semiconductor device

Semiconductor light emitting diode having a contact portion and a reflective portion

Method of fabricating wafer level package

Method to enable controlled side chip interconnection for 3D integrated packaging system

Integrated circuit package having offset vias

Integrated circuit packages and methods for forming the same

Semiconductor device and method of manufacturing the same

Semiconductor device and method of manufacturing the same, and wiring substrate and method of manufacturing the same

SEMICONDUCTOR CHIP WITH EXPANSIVE UNDERBUMP METALLIZATION STRUCTURES

Semiconductor device and method of forming an embedded SOP fan-out package

Method for forming fuse pad and bond pad of integrated circuit

Semiconductor device with output circuit and pad

Hybrid low metal loading flux

Integrated circuit packaging system with through silicon via and method of manufacture thereof

Bumpless build-up layer package design with an interposer

Bonding package components through plating

Carrier-free land grid array IC chip package and preparation method thereof

Electronic device packages having bumps and methods of manufacturing the same

Electrical interconnection structures including stress buffer layers

LED having vertical contacts redistruted for flip chip mounting

Manufacturing method of light-emitting device

METHOD AND APPARATUS FOR PROVIDING IMPROVED BACKSIDE METAL CONTACTS TO SILICON CARBIDE

Die edge contacts for semiconductor devices

Semiconductor device and method of manufacturing thereof

Solderless die attach to a direct bonded aluminum substrate

Electronic device and method for production

Methods and apparatus of packaging semiconductor devices

Reduced stress TSV and interposer structures

Wafer-level flip chip device packages and related methods

Bond pad assessment for wire bonding

Three dimensional microelectronic components and fabrication methods for same

Bonding material and bonding body, and bonding method

Semiconductor apparatus comprised of two types of transistors

Semiconductor device, inverter device provided with semiconductor device, and in-vehicle rotating electrical machine provided with semiconductor device and inverter device

Chip package and method for forming the same

Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers

Discrete semiconductor device package and manufacturing method

Integrated circuit including wire structure, related method and design structure

Chip package and method for forming the same

Coaxial solder bump support structure

Scheme for connector site spacing and resulting structures

Re-distribution Layer Via Structure and Method of Making Same

Back-side contact formation

Semiconductor device

Semiconductor apparatus, method of manufacturing semiconductor apparatus, method of designing semiconductor apparatus, and electronic apparatus

Interconnect barrier structure and method

THREE DIMENSIONAL MICROELECTRONIC COMPONENTS AND FABRICATION METHODS FOR SAME

Semiconductor device

Chip packages and methods for manufacturing a chip package

Semiconductor Constructions and Methods of Forming Semiconductor Constructions

Semiconductor constructions and methods of planarizing across a plurality of electrically conductive posts

Semiconductor wafer plating bus and method for forming

Chip package and method for forming the same

Reliable area joints for power semiconductors

Semiconductor device having through-electrode

Integrated circuit wiring fabrication and related methods and apparatus

Semiconductor package and fabrication method thereof

Three-dimensional chip stack and method of forming the same

Wire-based methodology of widening the pitch of semiconductor chip terminals

Semiconductor device

Chip package and method for forming the same

Package with metal-insulator-metal capacitor and method of manufacturing the same

Semiconductor device and production method thereof

Electric connecting structure comprising preferred oriented CuSngrains and method for fabricating the same

Semiconductor device and method of forming guard ring around conductive TSV through semiconductor wafer

Methods of forming bonded semiconductor structures

CHIP CONNECTION STRUCTURE AND METHOD OF FORMING

Protected solder ball joints in wafer level chip-scale packaging

Ramp-stack chip package with variable chip spacing

WSP DIE HAVING REDISTRIBUTION LAYER CAPTURE PAD WITH AT LEAST ONE VOID

WSP DIE WITH OFFSET REDISTRIBUTION LAYER CAPTURE PAD

Semiconductor package with stacked semiconductor chips

Semiconductor packages and methods of formation thereof

Cu pillar bump with electrolytic metal sidewall protection

SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME

Method of fabricating a power semiconductor chip package

Method for testing through-silicon-via (TSV) structures

Method for the wafer-level integration of shape memory alloy wires

Chip package and method for forming the same

Stack of semiconductor structures and corresponding manufacturing method

Bump structure, having concave lateral sides, semiconductor package having the bump structure, and method of forming the bump structure

Electronic device packages including bump buffer spring pads and methods of manufacturing the same

SEMICONDUCTOR CHIP, SEMICONDUCTOR PACKAGE HAVING THE SAME, AND STACKED SEMICONDUCTOR PACKAGE USING THE SEMICONDUCTOR PACKAGE

Light emitting device chip scale package

Wafer level packaged GaN power semiconductor device and the manufacturing method thereof

Semiconductor package and methods of formation thereof

Method for obtaining a palladium surface finish for copper wire bonding on printed circuit boards and IC-substrates