208262 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes; Substrate region of field-effect devices of field-effect transistors with insulated gate
Semiconductor devices including superlattice depletion layer stack and related methods
#302Semiconductor device having V-shaped region
#303Methods of forming stressed multilayer FinFET devices with alternative channel materials
#304Extended-drain MOS transistor in a thin film on insulator
#305Semiconductor device including a separation region formed around a first circuit region
#306Semiconductor device with low-conducting buried and/or surface layers
#307Semiconductor devices and methods of manufacturing the same
#308Semiconductor device having local buried oxide
#309Strained InGaAs quantum wells for complementary transistors
#310High-voltage cascaded diode with HEMT and monolithically integrated semiconductor diode
#311Semiconductor device having a double deep well
#312MOSFETs with multiple dislocation planes
#313Method of forming semiconductor device
#314Semiconductor device with compensation regions
#315Power semiconductor device and method of fabricating the same
#316Semiconductor device and method of manufacturing the semiconductor device
#317Methods of containing defects for non-silicon device engineering
#318Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates
#319Strained gate-all-around semiconductor devices formed on globally or locally isolated substrates
#320Semiconductor device having germanium active layer with underlying parasitic leakage barrier layer
#321Electronic devices and systems, and methods for making and using the same
#322Semiconductor device including a trench in a semiconductor substrate and method of manufacturing a semiconductor device
#323Compound semiconductor device and method for manufacturing the same
#324Graphene electronic device and method of fabricating the same
#325Structure, structure and method of latch-up immunity for high and low voltage integrated circuits
#326Entrenched transfer gate
#327RECESSED DEVICE REGION IN EPITAXIAL INSULATING LAYER
#328Structure, structure and method of latch-up immunity for high and low voltage integrated circuits
#329Semiconductor device with low-conducting buried and/or surface layers
#330Method of integrating high voltage devices
#331Semiconductor device including an n-well structure
#332Electronic devices and systems, and methods for making and using the same
#333Electronic devices and systems, and methods for making and using the same
#334NITRIDE-BASED SEMICONDUCTOR DEVICE HAVING EXCELLENT STABILITY
#335Electronic devices and systems, and methods for making and using the same
#336Semiconductor device and method of fabricating the same
#337Semiconductor device
#338Semiconductor device
#339Graphene electronic device and method of fabricating the same
#340Entrenched transfer gate
#341Semiconductor device with a depletion channel and method of manufacturing the same
#342Method of forming a planar field effect transistor with embedded and faceted source/drain stressors on a silicon-on-insulator (SOI) wafer, a planar field effect transistor structure and a design structure for the planar field effect transistor
#343Semiconductor device and method of fabricating the same
#344Method of fabricating a semiconductor device including high voltage and low voltage MOS devices
#345Electronic devices and systems, and methods for making and using the same
#346Semiconductor device and method of fabricating the same
#347Method of forming a planar field effect transistor with embedded and faceted source/drain stressors on a silicon-on-insulator (S0I) wafer, a planar field effect transistor structure and a design structure for the planar field effect transistor
#348Power device structures and methods
#349MOS-gated power devices, methods, and integrated circuits
#350Semiconductor element
#351Semiconductor device
#352METHOD FOR SUPPRESSING LATTICE DEFECTS IN A SEMICONDUCTOR SUBSTRATE
#353Structure, structure and method of latch-up immunity for high and low voltage integrated circuits
#354Semiconductor device
#355Method for creating tensile strain by selectively applying stress memorization techniques to NMOS transistors
#356Method for suppressing lattice defects in a semiconductor substrate
#357Semiconductor structure
#358Method of producing a semiconductor element in a substrate and a semiconductor element
#359Method for self-aligned removal of a high-K gate dielectric above an STI region
#360Lateral DMOS device and method for fabricating the same
#361Electrostatic discharge protection device
#362Semiconductor Device Having an Implanted Precipitate Region and a Method of Manufacture Therefor
#363Lateral compensation component
#364Method of producing a semiconductor element and semiconductor element
#365SEMICONDUCTOR DEVICE HAVING PARTIALLY INSULATED FIELD EFFECT TRANSISTOR (PiFET) AND METHOD OF FABRICATING THE SAME
#366Semiconductor device and method of fabricating the same
#367Void formation for semiconductor junction capacitance reduction
#368Method of forming an integrated circuit having a device wafer with a diffused doped backside layer
#369High-voltage PMOS transistor
#370Method for making a semiconductor device comprising a lattice matching layer
#371Semiconductor device comprising a lattice matching layer
#372Semiconductor device exhibiting a high breakdown voltage and the method of manufacturing the same
#373Semiconductor device and method for manufacturing same
#374Semiconductor device including high voltage and low voltage MOS devices
#375Threshold voltage control layer in a semiconductor device
#376Limiting net curvature in a wafer
#377Method for fabricating a voltage-stable PMOSFET semiconductor structure
#378Integrated circuit having a device wafer with a diffused doped backside layer
#379MOS type semiconductor device having electrostatic discharge protection arrangement
#380Semiconductor element and manufacturing method thereof
#381Bidirectional high voltage switching device and energy recovery circuit having the same
#382Semiconductor device exhibiting a high breakdown voltage and the method of manufacturing the same
#383Semiconductor device and manufacturing method thereof
#384Semiconductor device having partially insulated field effect transistor (PiFET) and method of fabricating the same
#385Semiconductor device and manufacturing method thereof
#386Offset-gate-type semiconductor device
#387Integrated circuit structure
#388Modular memory-like layout for finFET analog designs
#389Fin-based strap cell structure
#390Semiconductor device and method of fabricating the same
#391Switches with deep trench depletion and isolation structures
#392Semiconductor structure and method of manufacturing the same
#393Biasing the substrate region of an MOS transistor
#394Semiconductor device
#395Digital frequency multiplier to generate a local oscillator signal in FDSOI technology
#396Compressive strain semiconductor substrates
#397Power MOSFET having improved manufacturability, low on-resistance and high breakdown voltage
#398Tapered vertical FET having III-V channel
#399Epitaxial growth of high quality vanadium dioxide films with template engineering
#400Multi-gate device with planar channel
#401LDNMOS device for an ESD protection structure
#402Semiconductor device with dynamic low voltage triggering mechanism
#403High voltage semiconductor devices with Schottky diodes
#404FinFET extension regions
#405Semiconductor devices with dopant migration suppression and method of fabrication thereof