208262 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes; Substrate region of field-effect devices of field-effect transistors with insulated gate
SEMICONDUCTOR DEVICE WITH ISOLATION LAYER UNDER CONTACT
#2CELL PLACEMENT OPTIMIZATION
#3SEMICONDUCTOR DEVICE AND A METHOD OF FABRICATING THE SAME
#4INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE
#5High-Voltage Tolerant Device and Detection Circuit
#6Semiconductor integrated circuit device
#7Profile Control of Epitaxial Structures in Semiconductor Devices
#8Contacts for semiconductor devices and methods of forming the same
#9Semiconductor device and manufacturing method thereof
#10High voltage semiconductor device
#11Manufacturing method of high voltage semiconductor device
#12MEMORY DEVICE
#13III-nitride power semiconductor based heterojunction diode
#14SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
#15Bulk Nanosheet with Dielectric Isolation
#16Semiconductor integrated circuit device
#17Integrated circuit containing a decoy structure
#18Contact-over-active-gate transistor structures with contacts landed on enlarged gate portions
#19Method for fabricating a field-effect transistor with size-reduced source/drain epitaxy
#20Uniform threshold voltage non-planar transistors
#21Cell placement optimization
#22Contacts for semiconductor devices and methods of forming the same
#23Semiconductor devices
#24Method for manufacturing semiconductor device
#25High voltage semiconductor device and manufacturing method thereof
#26III-nitride thermal management based on aluminum nitride substrates
#27Contacts for semiconductor devices and methods of forming the same
#28Semiconductor device
#29Semiconductor device
#30Semiconductor device
#31Electronic devices and systems, and methods for making and using the same
#32Method of manufacturing a semiconductor device and a semiconductor device
#33Semiconductor device and a method of fabricating the same
#34Semiconductor device and manufacturing method thereof
#35Integrated circuit with P-N-P junction and vertically aligned field effect transistor, and method to form same
#36Semiconductor integrated circuit device
#37Fin-based strap cell structure
#38Semiconductor devices
#39Semiconductor device
#40Methods of reducing the electrical and thermal resistance of SiC substrates and device made thereby
#41Manufacturing method for CMOS LTPS TFT substrate
#42MEMORY ARRAY WITH CONTINUOUS DIFFUSION FOR BIT-CELLS AND SUPPORT CIRCUITRY
#43Body-contacted field effect transistors configured for test and methods
#44Contact isolation in semiconductor devices
#45P-type MOSFET and method for manufacturing same
#46Semiconductor devices with nanowires and methods for fabricating the same
#47Field-effect transistor with size-reduced source/drain epitaxy and fabrication method thereof
#48Integrated circuit containing a decoy structure
#49Semiconductor device
#50Semiconductor devices with wide gate-to-gate spacing
#51Semiconductor chip integrating high and low voltage devices
#52Power semiconductor device
#53Semiconductor device and a method for fabricating the same
#54Semiconductor integrated circuit device
#55Transistors comprising a vertical stack of elongated semiconductor features
#56Fin-based strap cell structure
#57Method of manufacturing a semiconductor device and a semiconductor device
#58FinFET gate cut after dummy gate removal
#59Semiconductor device including SGT
#60Substrate defect blocking layers for strained channel semiconductor devices
#61Semiconductor structure and method of manufacturing the same
#62Fin field effect transistor having crystalline titanium germanosilicide stressor layer
#63Oxidized cavity structures within and under semiconductor devices
#64Semiconductor device
#65Integrated device with vertical field-effect transistors and hybrid channels
#66Integrated device with vertical field-effect transistors and hybrid channels
#67Integrated circuit components with substrate cavities
#68Semiconductor device and method for manufacturing the same
#69Method for producing a pillar-shaped semiconductor device
#70Gate Stacks for Stack-Fin Channel I/O Devices and Nanowire Channel Core Devices
#71Methods of reducing the electrical and thermal resistance of SiC substrates and device made thereby
#72Semiconductor device comprising Schottky barrier diodes
#73Semiconductor structure and fabrication method thereof
#74Semiconductor device and semiconductor memory device
#75Methods for threshold voltage tuning and structure formed thereby
#76Stacked nanowire transistors
#77LOCAL WIRING IN BETWEEN STACKED DEVICES
#78Method of manufacturing a semiconductor device and a semiconductor device
#79Semiconductor devices
#80Nanometer semiconductor devices having high-quality epitaxial layer
#81Nanometer semiconductor devices having high-quality epitaxial layer
#82Method of manufacturing a semiconductor device by using ion beam technique
#83Active semiconductor device on high-resistivity substrate and method therefor
#84Insulated gate semiconductor device and method of manufacturing same
#85Semiconductor devices including field effect transistors and methods of forming the same
#86Method of manufacturing semiconductor device
#87Semiconductor device and a method for fabricating the same
#88Method of forming FinFET channel and structures thereof
#89Silicon carbide semiconductor device
#90Semiconductor device and manufacturing method thereof
#91Methods for threshold voltage tuning and structures formed thereby
#92Vertical fin field effect transistor with reduced gate length variations
#93Bulk nanosheet with dielectric isolation
#94Peak current suppression
#95Source/drain recess etch stop layers and bottom wide-gap cap for III-V MOSFETs
#96Stacked indium gallium arsenide nanosheets on silicon with bottom trapezoid isolation
#97Semiconductor device having electrode pad and electrode layer intervening semiconductor layer inbetween and manufacturing method thereof
#98Semiconductor device with transistor portion having low injection region on the bottom of a substrate
#99Semiconductor device including SGT
#100Isolation manufacturing method for semiconductor structures
#101MOSFETs with multiple dislocation planes
#102Transistor structure
#103III-V semiconductor layers, III-V semiconductor device and methods of manufacturing thereof
#104Nanosheet channel post replacement gate process
#105Semiconductor device and method for manufacturing semiconductor device
#106Nanowire field effect transistor device having a replacement gate
#107Vertical fin field effect transistor with reduced gate length variations
#108Nanosheet isolated source/drain epitaxy by surface treatment and incubation delay
#109ESD protection circuit assembly for CMOS manufacturing process
#110ESD protection device structure compatible with CMOS process
#111Systems, methods and devices for isolation for subfin leakage
#112Method for forming a lateral super-junction MOSFET device and termination structure
#113Semiconductor device having improved trench and electrode structures
#114Source follower device for enhanced image sensor performance
#115Power semiconductor device having a field electrode
#116Semiconductor device and method for manufacturing the same
#117Method of manufacturing a semiconductor device and a semiconductor device
#118Semiconductor integrated circuit device
#119High voltage metal oxide semiconductor device and manufacturing method thereof
#120MOS-Gated Power Devices, Methods, and Integrated Circuits
#121Gate stacks for stack-fin channel I/O devices and nanowire channel core devices
#122Fin-based strap cell structure
#123Semiconductor devices with nanowires and methods for fabricating the same
#124Semiconductor device comprising Schottky barrier diodes
#125Gate stacks for stack-fin channel I/O devices and nanowire channel core devices
#126Etching Solution for Simultaneously Removing Silicon and Silicon-Germanium Alloy From a Silicon-Germanium/Silicon Stack During Manufacture of a Semiconductor Device
#127Semiconductor chip integrating high and low voltage devices
#128Bi-stable static random access memory (SRAM) bit cells that facilitate direct writing for storage
#129Electronic devices and systems, and methods for making and using the same
#130Method for programming a one-transistor DRAM memory cell and memory device
#131Method of manufacturing a semiconductor device and a semiconductor device
#132Techniques for forming transistors including group III-V material nanowires using sacrificial group IV material layers
#133SHORT CHANNEL TRENCH POWER MOSFET
#134Apparatus and methods to create an active channel having indium rich side and bottom surfaces
#135Semiconductor device having vertical transistors and method of forming same
#136Integrated circuit containing a decoy structure formed by an electrically insulated silicide sector
#137Semiconductor device and manufacturing method thereof
#138Insulated gate semiconductor device and method of manufacturing same
#139Power MOSFET Having Improved Manufacturability, Low On-Resistance and High Breakdown Voltage
#140Forming switch circuit with controllable phase node ringing
#141Nanosheet transistors on bulk material
#142Field-effect transistors with a body pedestal
#143Method for forming stacked nanowire transistors
#144Bottom channel isolation in nanosheet transistors
#145Bottom channel isolation in nanosheet transistors
#146Method for producing pillar-shaped semiconductor device
#147Method of forming a semiconductor device
#148Method for forming a lateral super-junction MOSFET device and termination structure
#149Method of manufacturing a FinFET varactor
#150Techniques for controlling transistor sub-fin leakage
#151Transistors having ultra thin fin profiles and their methods of fabrication
#152Semiconductor device including SGT and method for producing the same
#153HIGH VOLTAGE P-TYPE LATERAL DOUBLE-DIFFUSED METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR
#154Semiconductor device and a method for fabricating the same
#155Method for forming horizontal nanowires and devices manufactured thereof
#156Process for the manufacture of a semiconductor element comprising a layer for trapping charges
#157Nanowire field effect transistor having a metal gate surrounding semiconductor nanowire
#158Semiconductor device
#159III-V semiconductor layers, III-V semiconductor devices and methods of manufacturing thereof
#160Self-aligned back-plane and well contacts for fully depleted silicon on insulator device
#161Semiconductor component and fabricating method thereof
#162High quality vanadium dioxide films
#163Laterally diffused metal oxide semiconductor field-effect transistor and manufacturing method therefor
#164Compressive strain semiconductor substrates
#165Switch circuit with controllable phase node ringing
#166MOSFETs with multiple dislocation planes
#167Power MOSFET having improved manufacturability, low on-resistance and high breakdown voltage
#168Semiconductor devices and methods for forming a semiconductor device
#169Method and structure for forming a dense array of single crystalline semiconductor nanocrystals
#170Heterogeneous source drain region and extension region
#171SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
#172Semiconductor devices with nanowires and with metal layers having different grain sizes
#173Tapered vertical FET having III-V channel
#174Semiconductor device
#175Semiconductor device comprising a transistor cell including a source contact in a trench, method for manufacturing the semiconductor device and integrated circuit
#176Methods of reducing the electrical and thermal resistance of SiC substrates and devices made thereby
#177Trench Edge Termination Structure for Power Semiconductor Devices
#178Power semiconductor device having a field electrode
#179Trap layer substrate stacking technique to improve performance for RF devices
#180FinFET varactor
#181Lateral super-junction MOSFET device and termination structure
#182EPITAXIAL SUBSTRATE
#183Reconfigurable MOS Varactor
#184Latchup reduction by grown orthogonal substrates
#185Layout pattern for static random access memory
#186Semiconductor device and method
#187Bulk nanosheet with dielectric isolation
#188Method of forming FinFET channel and structures thereof
#189Bulk nanosheet with dielectric isolation
#190Electrostatic discharge protection apparatus and applications thereof
#191High-voltage semiconductor structure
#192Electrostatic discharge protection
#193Semiconductor device
#194Semiconductor devices including field effect transistors and methods of forming the same
#195Semiconductor device
#196Semiconductor structure and fabrication method thereof
#197MOSFET
#198III-V TRANSISTOR DEVICE WITH DOPED BOTTOM BARRIER
#199Nanometer semiconductor devices having high-quality epitaxial layer
#200Semiconductor device and method of manufacturing the same
#201THIN FILM TRANSISTOR AND PREPARATION METHOD THEREOF, ARRAY SUBSTRATE, AND DISPLAY PANEL
#202Method of manufacturing a semiconductor device having a trench at least partially filled with a conductive material in a semiconductor substrate
#203Switching Device for Power Conversion and Power Conversion Device
#204Semiconductor device and method of manufacturing semiconductor device
#205Method for forming stacked nanowire transistors
#206Semiconductor device
#207Electronic devices and systems, and methods for making and using the same
#208Bulk nanosheet with dielectric isolation
#209Semiconductor device and semiconductor integrated circuit using the same
#210Trap layer substrate stacking technique to improve performance for RF devices
#211VDMOS having shielding gate electrodes in trenches and method of making the same
#212EFFECTIVE PROGRAMMING METHOD FOR NON-VOLATILE FLASH MEMORY USING JUNCTION BAND TO BAND HOT ELECTRON
#213Reduced area power devices using deep trench isolation
#214Semiconductor device including three dimensional memory string
#215Semiconductor device comprising a transistor cell including a source contact in a trench, method for manufacturing the semiconductor device and integrated circuit
#216Semiconductor devices and methods of manufacturing the same
#217Semiconductor device and method of fabricating the same
#218Method of fabricating nanowire field effect transistor having a preplacement gate by using sacrificial etch layer
#219Methods of reducing the electrical and thermal resistance of SiC substrates and devices made thereby
#220Semiconductor device
#221Semiconductor device and method of manufacturing semiconductor device
#222Semiconductor device and method of manufacturing semiconductor device
#223Semiconductor device and method of manufacturing semiconductor device
#224Semiconductor device and method of manufacturing semiconductor device
#225Lateral super-junction MOSFET device and termination structure
#226High Voltage Vertical FPMOS Fets
#227Passive device and radio frequency module formed on high resistivity substrate
#228SEMICONDUCTOR STRUCTURE WITH JUNCTION LEAKAGE REDUCTION
#229Heterogeneous source drain region and extension region
#230Electronic devices and systems, and methods for making and using the same
#231III-V MOSFET with strained channel and semi-insulating bottom barrier
#232FinFET having buffer layer between channel and substrate
#233Semiconductor device
#234INTEGRATION OF DEVICES
#235Semiconductor device
#236Methods and Apparatus for Deuterium Anneal of Multi-Layered Semiconductor Structure
#237Semiconductor device
#238Semiconductor device and manufacturing method thereof
#239Method of forming FinFET channel
#240System and method for fabricating high voltage power MOSFET
#241Gate-all-around semiconductor device and method of fabricating the same
#242Process for single diffusion break with simplified process
#243MOSFETs with multiple dislocation planes
#244III-V MOSFET with strained channel and semi-insulating bottom barrier
#245Injection control in semiconductor power devices
#246Electrically erasable programmable non-volatile memory cell structure
#247Latchup reduction by grown orthogonal substrates
#248METHOD FOR FABRICATING A TRANSISTOR WITH A RAISED SOURCE-DRAIN STRUCTURE
#249Semiconductor device
#250High resistance layer for III-V channel deposited on group IV substrates for MOS transistors
#251Semiconductor device and method of fabricating the same
#252Semiconductor devices including field effect transistors and methods of forming the same
#253Semiconductor and method of fabricating the same
#254Semiconductor devices including channel dopant layer
#255THRESHOLD VOLTAGE ADJUSTMENT IN METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH SILICON OXYNITRIDE POLYSILICON GATE STACK ON FULLY DEPLETED SILICON-ON-INSULATOR
#256REDUCING LEAKAGE CURRENT IN SEMICONDUCTOR DEVICES
#257Field effect transistor
#258Semiconductor device integrating high and low voltage devices
#259High voltage multiple channel LDMOS
#260Integrated power module with improved isolation and thermal conductivity
#261Bandgap reference circuit
#262Semiconductor device
#263Semiconductor device including a trench at least partially filled with a conductive material in a semiconductor substrate
#264Nanowire field effect transistor device having a replacement gate
#265Level shift driver circuit capable of reducing gate-induced drain leakage current
#266Highly scalable single-poly non-volatile memory cell
#267One time programming memory cell, array structure and operating method thereof
#268Non-volatile memory and associated memory array, row decoder, column decoder, write buffer and sensing circuit
#269Compound semiconductor device and method of manufacturing the same
#270SOI WITH GOLD-DOPED HANDLE WAFER
#271Lateral double-diffused MOSFET and fabrication method thereof
#272Semiconductor device
#273P-FET with strained silicon-germanium channel
#274Injection control in semiconductor power devices
#275Methods and apparatus for artificial exciton in CMOS processes
#276SPACER CHAMFERING FOR A REPLACEMENT METAL GATE DEVICE
#277FIELD EFFECT TRANSISTOR STRUCTURE HAVING ONE OR MORE FINS
#278Composite semiconductor device with multiple threshold voltages
#279SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME
#280Reducing leakage current in semiconductor devices
#281Circuit and method for reducing BVii on highly overdriven devices
#282Semiconductor device including an n-well structure
#283Semiconductor device having super-junction structures
#284Nitride semiconductor device and nitride semiconductor substrate
#285Gate-all-around semiconductor device and method of fabricating the same
#286Vertically-conducting trench MOSFET
#287p-FET with strained silicon-germanium channel
#288NONVOLATILE SEMICONDUCTOR STORAGE DEVICE
#289FinFET fabrication method using buffer layers between channel and semiconductor substrate
#290Electronic devices and systems, and methods for making and using same
#291Semiconductor device and semiconductor device manufacturing method
#292Semiconductor device and semiconductor device manufacturing method
#293Switching device, a communication device, and a method for processing a carrier
#294MOS-gated power devices, methods, and integrated circuits
#295Semiconductor device and manufacturing method thereof
#296Drain Extended MOS Transistors With Split Channel
#297Semiconductor device having a high-K gate dielectric above an STI region
#298Semiconductor device and method of fabricating the same
#299MOS field effect transistor
#300Semiconductor device having a double deep well and method of manufacturing same