212707 ⎘
Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by; Details of package parts other than the semiconductor or other solid state devices to be connected; Frame; Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C Iron [Fe] as principal constituent
SOCKET INTERFACE FRAMES FOR DEVICES WITH IMPROVED-PERFORMANCE SUBSTRATES
#2Electronic device with multi-layer contact and system
#3Hermetic package for high CTE mismatch
#4Hermetic package for high CTE mismatch
#5Electronic device with multi-layer contact and system
#6Method for producing electronic device with multi-layer contact
#73D CHIP ASSEMBLIES USING STACKED LEADFRAMES
#8Chip package and a wafer level package
#9Structure and method for stabilizing leads in wire-bonded semiconductor devices
#10ELECTRONIC DEVICE
#11Semiconductor device and portable apparatus using the same
#12Strip-shaped substrate for producing chip carriers, electronic module with a chip carrier of this type, electronic device with a module of this type, and method for producing a substrate
#13Electronic Device with Multi-Layer Contact
#14Chip package and a wafer level package
#15Semiconductor package having etched foil capacitor integrated into leadframe
#16Method for manufacturing a chip package, a method for manufacturing a wafer level package, a chip package and a wafer level package
#17Electronic device with multi-layer contact
#183D chip assemblies using stacked leadframes