Nian Yang

SSD auxiliary battery power for handling ungraceful shutdown with host

SSD auxiliary battery power for handling ungraceful shutdown with host

Level dependent error correction code protection in multi-level non-volatile memory

Variable read scan for solid-state storage device quality of service

Pre-program read to counter wordline failures

Pre-program read to counter wordline failures

Method and apparatus for configuring a memory device

METHOD AND APPARATUS FOR WRITING DATA TO NON-VOLATILE MEMORY

Power management for nonvolatile memory array

Selective in-situ retouching of data in nonvolatile memory

Power management for nonvolatile memory array

Flash memory programming power reduction

Flash memory programming with data dependent control of source lines

Flash memory programming power reduction

System and method for multi-layer global bitlines

Semiconductor device having a pad metal layer and a lower metal layer that are electrically coupled, whereas apertures are formed in the lower metal layer below a center area of the pad metal layer

Bitcell current sense device and method thereof

Decoding system capable of charging protection for flash memory devices

Circuit pre-charge to sense a memory line

Controlled bit line discharge for channel erases in nonvolatile memory

Decoding system capable of reducing sector select area overhead for flash memory

Hybrid flash memory device

Capacitor structure used for flash memory

Compensation method to achieve uniform programming speed of flash memory devices

Flash memory device with external high voltage supply

Methods and systems for memory devices

Drain voltage regulator

Method to provide a higher reference voltage at a lower power supply in flash memory devices

Method and apparatus for high voltage operation for a high performance semiconductor memory device

METHOD AND APPARATUS FOR VERSATILE HIGH VOLTAGE LEVEL DETECTION WITH RELATIVE NOISE IMMUNITY

Voltage regulator with less overshoot and faster settling time

Method and apparatus for high voltage operation for a high performance semiconductor memory device

Method and apparatus for drain pump operation

METHOD AND APPARATUS FOR DRAIN PUMP POWER CONSERVATION

Voltage supply circuit for memory array programming

Decoder for memory device with loading capacitor

Charge-sharing technique during flash memory programming

Multi-bit flash memory device having improved program rate

High performance flash memory device capable of high density data storage

Method of forming gate electrode structures

Method of programming a flash memory device using multilevel charge storage

Electrostatic discharge performance of a silicon structure and efficient use of area with electrostatic discharge protective device under the pad approach and adjustment of via configuration thereto to control drain junction resistance

Flash memory unit and method of programming a flash memory device

Method of improving erase voltage distribution for a flash memory array having dummy wordlines

Circuit and technique for accurately sensing low voltage flash memory devices

Efficient use of wafer area with device under the pad approach

Efficient and accurate sensing circuit and technique for low voltage flash memory devices

Structure and method for a two-bit memory cell