Richard Schultz

ZERO DIFFUSION BREAK BETWEEN STANDARD CELLS USING THREE-DIMENSIONAL CROSS FIELD EFFECT SELF-ALIGNED TRANSISTORS

THERMALLY AWARE STACKING TOPOLOGY

BACKSIDE POWER

TEMPERATURE SENSORS IN DIE PAIR TOPOLOGY

APPARATUSES AND SYSTEMS FOR OFFSET CROSS FIELD-EFFECT TRANSISTORS

Routing and manufacturing with a minimum area metal structure

Inset power post and strap architecture with reduced voltage droop

Semiconductor chip with stacked conductor lines and air gaps

Semiconductor chip with stacked conductor lines and air gaps

Semiconductor device fabrication using a multiple exposure and block mask approach to reduce design rule violations

Method of creating photolithographic masks for semiconductor device features with reduced design rule violations

CAD flow for 15nm/22nm multiple fine grained wimpy gate lengths in SIT gate flow

Channel length scaling for footprint compatible digital library cell design

Methods for fabricating FinFET structures having different channel lengths

Failure analysis vehicle for yield enhancement with self test at speed burnin capability for reliability testing

Test vehicle data analysis

Defect analysis using a yield vehicle

Technique for high-speed TDF testing on low cost testers using on-chip or off-chip circuitry for RapidChip and ASIC devices

Fully shielded capacitor cell structure

Chip level clock tree deskew circuit

Self-timed reliability and yield vehicle array

Failure analysis vehicle for yield enhancement with self test at speed burnin capability for reliability testing

Static timing analysis and performance diagnostic display tool

Self-timed reliability and yield vehicle with gated data and clock