209365 ⎘
Details relating to semiconductor or other solid state devices covered by the group; Structural electrical arrangements for semiconductor devices not otherwise provided for; Impedance arrangements; High-frequency adaptations; High-frequency electrical connections Differential pair signal lines
ENCLOSURES FOR INTEGRATED CIRCUITS
#2WAVEGUIDE LAUNCHER IN PACKAGE BASED ON HIGH DIELECTRIC CONSTANT CARRIER
#3COAXIAL THROUGH VIA WITH NOVEL HIGH ISOLATION CROSS COUPLING METHOD FOR 3D INTEGRATED CIRCUITS
#4SEMICONDUCTOR SUBSTRATE ASSEMBLY AND MANUFACTURING METHOD THEREFOR
#5ELECTRONIC PACKAGE WITH ROTATED SEMICONDUCTOR DIE
#6SEMICONDUCTOR PACKAGE, BASE STATION, MOBILE DEVICE AND METHOD FOR FORMING A SEMICONDUCTOR PACKAGE
#7SEMICONDUCTOR DEVICE WITH MULTIPLE DIES
#8SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM
#9Semiconductor device on wiring board having reference potential planes with openings
#10Designing method and semiconductor device
#11Coaxial through via with novel high isolation cross coupling method for 3D integrated circuits
#12High dielectric constant carrier based packaging with enhanced WG matching for 5G and 6G applications
#13LOW LOSS MICROSTRIP AND STRIPLINE ROUTING WITH BLIND TRENCH VIAS FOR HIGH SPEED SIGNALING ON A GLASS CORE
#14Waveguide launcher in package based on high dielectric constant carrier
#15WIRING BOARD AND SEMICONDUCTOR PACKAGE
#16Semiconductor package and package-on-package including the same
#17High Frequency Package
#18INTEGRATED MILLIMETER-WAVE DUAL-MODE MATCHING NETWORK
#19Packaged integrated circuit device with built-in baluns
#20Substrate comprising interconnects in a core layer configured for skew matching
#21Semiconductor device having a plurality of terminals arranged thereon
#22Electronic package with rotated semiconductor die
#23Hybrid Dielectric Scheme in Packages
#24CHIP PACKAGING APPARATUS AND TERMINAL DEVICE
#25Ground reference shape for high speed interconnect
#26Transmission circuit and electronic device
#27Coaxial through via with novel high isolation cross coupling method for 3D integrated circuits
#28Hybrid dielectric scheme in packages
#29Functional panel, method for manufacturing the same and terminal
#30Semiconductor optical device
#31Signal routing carrier
#323D trench reference planes for integrated-circuit die packages
#33Single metal cavity antenna in package connected to an integrated transceiver front-end
#34Electronic package with rotated semiconductor die
#35Panel, manufacturing method thereof, and terminal
#36Package design scheme for enabling high-speed low-loss signaling and mitigation of manufacturing risk and cost
#37Signal transmission method and apparatus, and display device
#38Variable in-plane signal to ground reference configurations
#39Circuit structure and chip package
#40Optical module and manufacturing method of optical module
#41Minimization of insertion loss variation in through-silicon vias (TSVs)
#42Compound via RF transition structure in a multilayer high-density interconnect
#43Millimeter wave integrated circuit and system with a low loss package transition
#44Transmission circuit and electronic device
#45ELECTRICAL ROUTING COMPONENT LAYOUT FOR CROSSTALK REDUCTION
#46Circularly-polarized dielectric waveguide launch for millimeter-wave data communication
#47HIGH-VOLTAGE CAPACITOR STRUCTURE AND DIGITAL ISOLATION APPARATUS
#48Cross talk reduction differential cross over routing systems and methods
#49Circuit for providing electrostatic discharge protection on an integrated circuit and associated method and apparatus
#50Semiconductor device
#51Semiconductor device
#52High-frequency ceramic board and high-frequency semiconductor element package
#53Semiconductor package having inductive lateral interconnects
#54High-density dual-embedded microstrip interconnects
#55Dielectric coating for crosstalk reduction
#56High-density triple diamond stripline interconnects
#57SINGLE CLOCK SOURCE FOR A MULTIPLE DIE PACKAGE
#58Electrical interconnect for a flexible electronic package
#59Semiconductor device and semiconductor package including plural solder ball sets each corresponding to a pair of differential input and differential output signals
#60MULTI-LAYER IC SOCKET WITH AN INTEGRATED IMPEDANCE MATCHING NETWORK
#61Semiconductor device
#62Integrated circuits having on-chip inductors with low common mode coupling effect
#63Semiconductor structure
#64Coaxial through via with novel high isolation cross coupling method for 3D integrated circuits
#65Circuit board having a ground layer including a plurality of polygonal openings
#66Package substrate differential impedance optimization for 25 to 60 Gbps and beyond
#67RF transformer for differential amplifier
#68Semiconductor device
#69High-frequency package
#70High-frequency package
#71Die package with low electromagnetic interference interconnection
#72Method for manufacturing a semiconductor component having a common mode filter monolithically integrated with a protection device
#73Transmission circuit and semiconductor integrated circuit
#74Semiconductor device
#75IC-package interconnect for millimeter wave systems
#76Systems, methods and devices for inter-substrate coupling
#77Electronic device assemblies including conductive vias having two or more conductive elements
#78Apparatus and methods for shielding differential signal pin pairs
#79Semiconductor device and semiconductor package having a plurality of differential signal balls
#80Semiconductor device and semiconductor package
#81Isolating differential transmission lines
#82Interconnect arrangement for hexagonal attachment configurations
#83Semiconductor device and circuit board
#84Semiconductor structure and method of generating masks for making integrated circuit
#85Differential return loss supporting high speed bus interfaces
#86Electronic device assemblies including conductive vias having two or more conductive elements
#87Electronic circuit, method of manufacturing electronic circuit, and mounting member
#88Interconnecting mechanism for 3D integrated circuit
#89On-chip transmission line structures with balanced phase delay
#90Differential transmission line pairs using a coupling orthogonalization approach to reduce cross-talk
#91Mixed wire bonding profile and pad-layout configurations in IC packaging processes for high-speed electronic devices
#92Semiconductor device and wiring board
#93DIFFERENTIAL SIGNAL TRANSMISSION LINE, IC PACKAGE, AND METHOD FOR TESTING SAID DIFFERENTIAL SIGNAL TRANSMISSION LINE AND IC PACKAGE
#94Method for manufacturing a semiconductor component that includes a common mode choke and structure
#95Semiconductor device and method of forming high-attenuation balanced band-pass filter
#96Two-shelf interconnect
#97Semiconductor package
#98Interconnect pattern for transceiver package
#99Interconnect pattern for high performance interfaces
#100Interconnection structure
#101Via structure integrated in electronic substrate
#102Impedance optimized chip system
#103Wave guiding structures for crosstalk reduction
#104High-bandwidth ramp-stack chip package
#105System and method to reduce the bondwire/trace inductance
#106Multi chip semiconductor device
#107Electronic device assemblies including conductive vias having two or more conductive elements
#108High frequency and wide band impedance matching via
#109Semiconductor module
#110Connection terminal, package using the same, and electronic apparatus
#111Interconnect structure
#112Transistor and routing layout for a radio frequency integrated CMOS power amplifier device
#113Differential internally matched wire-bond interface
#114Integrated circuit package for high-speed signals
#115Semiconductor integrated circuit package, printed circuit board, semiconductor apparatus, and power supply wiring structure
#116Semiconductor Package, Printed Wiring Board Structure and Electronic Apparatus
#117Resin molded semiconductor device and differential amplifier circuit
#118Semiconductor device
#119Wirebond Package Design for High Speed Data Rates
#120SEMICONDUCTOR SUBSTRATE FOR TRANSMITTING DIFFERENTIAL PAIR
#121System, device and method for reducing cross-talk in differential signal conductor pairs
#122Device mounting board and semiconductor module
#123Via structure
#124System on package of a mobile RFID interrogator
#125Semiconductor package substrate
#126WIRING STRUCTURE, MULTILAYER WIRING BOARD, AND ELECTRONIC DEVICE
#127Electronic devices including conductive vias having two or more conductive elements for providing electrical communication between traces in different planes in a substrate, and accompanying methods
#128Differential transmission line structure and wiring substrate
#129Integrated circuit with at least one integrated transmission line
#130Multilayer printed circuit board for high-speed differential signal, communication apparatus, and data storage apparatus
#131Techniques for alleviating the need for DC blocking capacitors in high-speed differential signal pairs
#132Packaging for high speed integrated circuits
#133Broadband differential coupling circuit having coupled differential aggressor and signal channels
#134High speed interface design
#135Packaging for high speed integrated circuits
#136Packaging for high speed integrated circuits
#137Packaging for high speed integrated circuits
#138Packaging for high speed integrated circuits
#139Packaging for high speed integrated circuits
#140Packaging for high speed integrated circuits
#141Integrated circuit device including interface circuit and electronic apparatus
#142Ball assignment system
#143High frequency and wide band impedance matching via
#144Mounting pad structure for wire-bonding type lead frame packages
#145Flexible substrate and electronic equipment
#146System in package
#147Multi-layer substrate structure for reducing layout area
#148Integrated circuit package differential pin pattern for cross-talk reduction
#149Package substrate differential impedance optimization for 25 to 60 GBPS and beyond
#150Two-end driving, high-frequency sub-substrate structure and high-frequency transmission structure including the same
#151Methods and apparatus for passive equalization in high-speed and high density integrated circuits