Sunnyvale, California
United States
118
2019-10-31
118
2020-03-17
These are the the leading inventors for applications assigned to Alpha & Omega Semiconductor, Inc.:
Alpha & Omega Semiconductor, Inc. based in Sunnyvale, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Nanotube semiconductor devices
#2 | 2015-07-23 ✅ Patent 9,437,587 granted on 2016-09-06Flip chip semiconductor device
#3 | 2015-06-18 ✅ Patent 9,041,172 granted on 2015-05-26Semiconductor device for restraining creep-age phenomenon and fabricating method thereof
#4 | 2015-03-12 ✅ Patent 9,147,648 granted on 2015-09-29Multi-die power semiconductor device packaged on a lead frame unit with multiple carrier pins and a metal clip
#5 | 2015-02-10 ✅ Patent 8,952,509 granted on 2015-02-10Stacked multi-chip bottom source semiconductor device and preparation method thereof
#6 | 2015-02-05 ✅ Patent 9,006,870 granted on 2015-04-14Stacked multi-chip packaging structure and manufacturing method thereof
#7 | 2015-01-22 ✅ Patent 9,006,901 granted on 2015-04-14Thin power device and preparation method thereof
#8 | 2014-12-11 ✅ Patent 9,054,091 granted on 2015-06-09Hybrid packaged lead frame based multi-chip semiconductor device with multiple semiconductor chips and multiple interconnecting structures
#9 | 2014-12-11 ✅ Patent 8,981,539 granted on 2015-03-17Packaged power semiconductor with interconnection of dies and metal clips on lead frame
#10 | 2014-10-30 ✅ Patent 9,136,379 granted on 2015-09-15Bottom source substrateless power MOSFET
#11 | 2014-10-23 ✅ Patent 8,933,545 granted on 2015-01-13Double-side exposed semiconductor device
#12 | 2014-09-23 ✅ Patent 8,841,167 granted on 2014-09-23Manufacturing method of a semiconductor package of small footprint with a stack of lead frame die paddle sandwiched between high-side and low-side MOSFET
#13 | 2014-09-18 ✅ Patent 8,865,523 granted on 2014-10-21Semiconductor package and fabrication method thereof
#14 | 2014-09-11 ✅ Patent 9,136,377 granted on 2015-09-15High density MOSFET array with self-aligned contacts delimited by nitride-capped trench gate stacks and method
#15 | 2014-08-21 ✅ Patent 9,006,053 granted on 2015-04-14Method of making MOSFET integrated with schottky diode with simplified one-time top-contact trench etching
#16 | 2014-07-15 ✅ Patent 8,778,735 granted on 2014-07-15Packaging method of molded wafer level chip scale package (WLCSP)
#17 | 2014-07-10 ✅ Patent 8,933,518 granted on 2015-01-13Stacked power semiconductor device using dual lead frame
#18 | 2014-06-19 ✅ Patent 9,029,236 granted on 2015-05-12Termination structure with multiple embedded potential spreading capacitive for trench MOSFET and method
#19 | 2014-06-05 ✅ Patent 8,952,669 granted on 2015-02-10Average inductor current mode voltage control device and method
#20 | 2014-05-22 ✅ Patent 8,877,555 granted on 2014-11-04Flip-chip semiconductor chip packing method
#21 | 2014-04-17 ✅ Patent 8,933,549 granted on 2015-01-13Dual-leadframe multi-chip package
#22 | 2014-04-03 ✅ Patent 8,716,069 granted on 2014-05-06Semiconductor device employing aluminum alloy lead-frame with anodized aluminum
#23 | 2014-03-20 ✅ Patent 9,040,357 granted on 2015-05-26Semiconductor packaging method using connecting plate for internal connection
#24 | 2014-03-13 ✅ Patent 9,147,586 granted on 2015-09-29Semiconductor package with connecting plate for internal connection
#25 | 2014-02-04 ✅ Patent 8,642,397 granted on 2014-02-04Semiconductor wafer level package (WLP) and method of manufacture thereof
#26 | 2014-01-02 ✅ Patent 8,722,467 granted on 2014-05-13Method of using bonding ball array as height keeper and paste holder in semiconductor device package
#27 | 2013-11-21 ✅ Patent 8,722,468 granted on 2014-05-13Semiconductor encapsulation method
#28 | 2013-08-29 ✅ Patent 8,716,985 granted on 2014-05-06Power factor correction device and correcting method thereof
#29 | 2013-08-29 ✅ Patent 8,703,545 granted on 2014-04-22Aluminum alloy lead-frame and its use in fabrication of power semiconductor package
#30 | 2013-08-15 ✅ Patent 8,785,296 granted on 2014-07-22Packaging method with backside wafer dicing
#31 | 2013-08-15 ✅ Patent 8,563,361 granted on 2013-10-22Packaging method of molded wafer level chip scale package (WLCSP)
#32 | 2013-05-23 ✅ Patent 8,563,417 granted on 2013-10-22Method for packaging ultra-thin chip with solder ball thermo-compression in wafer level packaging process
#33 | 2013-04-18 ✅ Patent 8,486,803 granted on 2013-07-16Wafer level packaging method of encapsulating the bottom and side of a semiconductor chip
#34 | 2013-03-28 ✅ Patent 8,519,520 granted on 2013-08-27Semiconductor package of small footprint with a stack of lead frame die paddle sandwich between high-side and low-side MOSFETs and manufacturing method
#35 | 2013-03-21 ✅ Patent 8,884,600 granted on 2014-11-11Average inductor current control using variable reference voltage
#36 | 2013-02-28 ✅ Patent 8,709,893 granted on 2014-04-29Method of making a low-Rdson vertical power MOSFET device
#37 | 2013-02-14 ✅ Patent 8,710,648 granted on 2014-04-29Wafer level packaging structure with large contact area and preparation method thereof
#38 | 2013-02-14 ✅ Patent 8,642,385 granted on 2014-02-04Wafer level package structure and the fabrication method thereof
#39 | 2013-02-14 ✅ Patent 8,853,003 granted on 2014-10-07Wafer level chip scale package with thick bottom metal exposed and preparation method thereof
#40 | 2013-01-31 ✅ Patent 8,450,152 granted on 2013-05-28Double-side exposed semiconductor device and its manufacturing method
#41 | 2013-01-17 ✅ Patent 8,362,585 granted on 2013-01-29Junction barrier Schottky diode with enforced upper contact structure and method for robust packaging
#42 | 2012-11-29 ✅ Patent 8,502,509 granted on 2013-08-06Power conversion system and power control method for reducing cross regulation effect
#43 | 2012-11-29 ✅ Patent 8,436,429 granted on 2013-05-07Stacked power semiconductor device using dual lead frame and manufacturing method
#44 | 2012-11-22 ✅ Patent 8,587,061 granted on 2013-11-19Power MOSFET device with self-aligned integrated Schottky diode
#45 | 2012-11-15 ✅ Patent 8,497,160 granted on 2013-07-30Method for making solder-top enhanced semiconductor device of low parasitic packaging impedance
#46 | 2012-10-18 ✅ Patent 8,642,429 granted on 2014-02-04Wide and deep oxide trench in a semiconductor substrate with interspersed vertical oxide ribs
#47 | 2012-10-04 ✅ Patent 8,476,752 granted on 2013-07-02Package structure for DC-DC converter
#48 | 2012-10-04 ✅ Patent 8,669,650 granted on 2014-03-11Flip chip semiconductor device
#49 | 2012-09-20 ✅ Patent 8,796,858 granted on 2014-08-05Virtually substrate-less composite power semiconductor device
#50 | 2012-09-20 ✅ Patent 8,564,110 granted on 2013-10-22Power device with bottom source electrode
#51 | 2012-09-20 ✅ Patent 8,643,137 granted on 2014-02-04Short channel lateral MOSFET
#52 | 2012-08-16 ✅ Patent 8,633,512 granted on 2014-01-21Device and associated semiconductor package for limiting drain-source voltage of transformer-coupled push pull power conversion circuit
#53 | 2012-08-02 ✅ Patent 8,933,550 granted on 2015-01-13Structure of mixed semiconductor encapsulation structure with multiple chips and capacitors
#54 | 2012-07-12 ✅ Patent 8,344,499 granted on 2013-01-01Chip-exposed semiconductor device
#55 | 2012-06-28 ✅ Patent 8,283,212 granted on 2012-10-09Method of making a copper wire bond package
#56 | 2012-06-28 ✅ Patent 8,338,232 granted on 2012-12-25Power semiconductor device package method
#57 | 2012-06-28 ✅ Patent 8,709,867 granted on 2014-04-29Dual-leadframe multi-chip package and method of manufacture
#58 | 2012-06-14 ✅ Patent 8,586,414 granted on 2013-11-19Top exposed package and assembly method
#59 | 2012-03-29 ✅ Patent 8,669,613 granted on 2014-03-11Semiconductor device die with integrated MOSFET and low forward voltage diode-connected enhancement mode JFET and method
#60 | 2012-03-22 ✅ Patent 8,969,950 granted on 2015-03-03Integrated MOSFET-Schottky diode device with reduced source and body Kelvin contact impedance and breakdown voltage
#61 | 2012-03-15 ✅ Patent 8,217,503 granted on 2012-07-10Package structure for DC-DC converter
#62 | 2012-03-01 ✅ Patent 8,431,993 granted on 2013-04-30Semiconductor package for forming a leadframe package
#63 | 2012-02-16 ✅ Patent 8,354,334 granted on 2013-01-15Power semiconductor chip with a formed patterned thick metallization atop
#64 | 2012-02-09 ✅ Patent 8,288,273 granted on 2012-10-16Method for forming a patterned thick metallization atop a power semiconductor chip
#65 | 2012-02-09 ✅ Patent 8,569,169 granted on 2013-10-29Bottom source power MOSFET with substrateless and manufacturing method thereof
#66 | 2012-02-09 ✅ Patent 8,183,662 granted on 2012-05-22Compact semiconductor package with integrated bypass capacitor
#67 | 2012-02-02 ✅ Patent 8,519,525 granted on 2013-08-27Semiconductor encapsulation and method thereof
#68 | 2012-02-02 ✅ Patent 8,362,606 granted on 2013-01-29Wafer level chip scale package
#69 | 2011-12-29 ✅ Patent 8,456,141 granted on 2013-06-04Boost converter with integrated high power discrete FET and low voltage controller
#70 | 2011-12-29 ✅ Patent 8,252,648 granted on 2012-08-28Power MOSFET device with self-aligned integrated Schottky and its manufacturing method
#71 | 2011-12-22 ✅ Patent 8,686,546 granted on 2014-04-01Combined packaged power semiconductor device
#72 | 2011-12-01 ✅ Patent 8,866,267 granted on 2014-10-21Semiconductor device with substrate-side exposed device-side electrode and method of fabrication
#73 | 2011-11-24 ✅ Patent 8,236,613 granted on 2012-08-07Wafer level chip scale package method using clip array
#74 | 2011-11-24 ✅ Patent 8,163,601 granted on 2012-04-24Chip-exposed semiconductor device and its packaging method
#75 | 2011-11-03 ✅ Patent 8,466,060 granted on 2013-06-18Stackable power MOSFET, power MOSFET stack, and process of manufacture
#76 | 2011-10-06 ✅ Patent 8,242,013 granted on 2012-08-14Virtually substrate-less composite power semiconductor device and method
#77 | 2011-09-29 ✅ Patent 8,367,501 granted on 2013-02-05Oxide terminated trench MOSFET with three or four masks
#78 | 2011-09-15 ✅ Patent 8,722,466 granted on 2014-05-13Semiconductor packaging and fabrication method using connecting plate for internal connection
#79 | 2011-08-18 ✅ Patent 8,399,925 granted on 2013-03-19Termination structure with multiple embedded potential spreading capacitive structures for trench MOSFET and method
#80 | 2011-08-11 ✅ Patent 8,481,368 granted on 2013-07-09Semiconductor package of a flipped MOSFET and its manufacturing method
#81 | 2011-07-28 ✅ Patent 8,937,356 granted on 2015-01-20Electrostatic discharge (ESD) protection applying high voltage lightly doped drain (LDD) CMOS technologies
#82 | 2011-07-14 ✅ Patent 8,258,767 granted on 2012-09-04Power conversion system and power control method for reducing cross regulation effect
#83 | 2011-06-23 ✅ Patent 8,264,861 granted on 2012-09-11Device and method for limiting drain-source voltage of transformer-coupled push pull power conversion circuit
#84 | 2011-06-16 ✅ Patent 8,247,297 granted on 2012-08-21Method of filling large deep trench with high quality oxide for semiconductor devices
#85 | 2011-06-16 ✅ Patent 8,247,329 granted on 2012-08-21Nanotube semiconductor devices
#86 | 2011-05-05 ✅ Patent 8,372,738 granted on 2013-02-12Method for manufacturing a gallium nitride based semiconductor device with improved termination scheme
#87 | 2011-04-28 ✅ Patent 8,138,605 granted on 2012-03-20Multiple layer barrier metal for device component formed in contact trench
#88 | 2011-04-21 ✅ Patent 8,305,054 granted on 2012-11-06Inductive conversion device and energy control method
#89 | 2011-03-17 ✅ Patent 8,482,048 granted on 2013-07-09Metal oxide semiconductor field effect transistor integrating a capacitor
#90 | 2011-03-10 ✅ Patent 8,247,288 granted on 2012-08-21Method of integrating a MOSFET with a capacitor
#91 | 2011-02-03 ✅ Patent 8,178,954 granted on 2012-05-15Structure of mixed semiconductor encapsulation structure with multiple chips and capacitors
#92 | 2011-01-27 ✅ Patent 8,084,304 granted on 2011-12-27Method for preventing gate oxide damage of a trench MOSFET during wafer processing while adding an ESD protection module atop
#93 | 2011-01-20 ✅ Patent 8,148,817 granted on 2012-04-03Multi-die DC-DC buck power converter with efficient packaging
#94 | 2010-12-16 ✅ Patent 7,910,486 granted on 2011-03-22Method for forming nanotube semiconductor devices
#95 | 2010-12-16 ✅ Patent 8,299,494 granted on 2012-10-30Nanotube semiconductor devices
#96 | 2010-11-04 ✅ Patent 8,288,839 granted on 2012-10-16Transient voltage suppressor having symmetrical breakdown voltages
#97 | 2010-09-21 ✅ Patent 7,800,170 granted on 2010-09-21Power MOSFET device with tungsten spacer in contact hole and method
#98 | 2010-08-19 ✅ Patent 8,013,414 granted on 2011-09-06Gallium nitride semiconductor device with improved forward conduction
#99 | 2010-08-19 ✅ Patent 7,842,974 granted on 2010-11-30Gallium nitride heterojunction schottky diode
#100 | 2010-08-12 ✅ Patent 7,902,604 granted on 2011-03-08Configuration of gate to drain (GD) clamp and ESD protection circuit for power device breakdown protection
Also check out Alpha & Omega Semiconductor, Inc.'s (Sunnyvale, United States) applicant profile with 2 patent applications submitted.
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