Memory chip package having optically and electrically connected chips, memory system having the same and driving method thereof

Method of manufacturing substrate for chip packages and method of manufacturing chip package

Semiconductor package and printed circuit board

Three-dimensional semiconductor architecture

Wafer level chip scale packaging intermediate structure apparatus and method

Metal cap apparatus and method

Package on-package joint structure with molding open bumps

Semiconductor device and method of forming a dual UBM structure for lead free bump connections

Package-on-package structure and method of forming same

Package on-package structure

Method for manufacturing a semiconductor chip with each contact pad having a pad cell associated therewith

Power overlay structure and method of making same

No-exposed-pad quad flat no-lead (QFN) packaging structure and method for manufacturing the same

High-frequency module

Microelectronic elements with master/slave configurability

Semiconductor module and method for manufacturing same

Light-emitting module and method of manufacturing a single light-emitting structure thereof

Bonding system

Electronic component and electronic component cooling method

Integrated circuit device and electronic apparatus

Integrated high voltage isolation using low value capacitors

Semiconductor package

Bonding structure of semiconductor package, method for fabricating the same, and stack-type semiconductor package

Semiconductor Device and Method of Forming Sacrificial Adhesive Over Contact Pads of Semiconductor Die

Semiconductor substrates with unitary vias and via terminals, and associated systems and methods

Method and apparatus for constructing an isolation capacitor in an integrated circuit

Chip-on-lead package and method of forming

Three-dimensional integrated circuit (3DIC)

Package-on-package assembly and method

MEMS device and method of formation thereof

Wide spectrum LED components

Floating bond pad for power semiconductor devices

Package on package structure

Semiconductor device including dummy pattern

Semiconductor device, wireless device, and storage device

Semiconductor device and method of forming topside and bottom-side interconnect structures around core die with TSV

Electronic device comprising at least a chip enclosed in a package and a corresponding assembly process

Semiconductor device

Buried TSVs used for decaps

Current sensors and methods

Etching agent for copper or copper alloy

Semiconductor package and method of forming the same

Medical apparatus and X-ray high voltage apparatus

3D semiconductor device

Connector structures of integrated circuits

Chip package and method for forming the same

Method for incorporating stress sensitive chip scale components into reconstructed wafer based modules

Methods for forming a sensor array package

Front side copper post joint structure for temporary bond in TSV application

Semiconductor device and method of forming insulating layer in notches around conductive TSV for stress relief

Semiconductor device with conductive pillars having recesses or protrusions to detect interconnect continuity between semiconductor die and substrate

Copper pillar full metal via electrical circuit structure

Structure and method of forming a pad structure having enhanced reliability

Semiconductor device, semiconductor package, and electronic device

Semiconductor device, and manufacturing method for same

3D integrated circuit package with through-mold first level interconnects

Semiconductor device

Semiconductor device, manufacturing method thereof, and electronic apparatus

Magnetic sensor integrated in a chip for detecting magnetic fields perpendicular to the chip and manufacturing process thereof

Light emitter devices

Lead frame support plate and window clamp for wire bonding machines

Method of making a die with recessed aluminum die pads

Microelectronic package with stacked microelectronic units and method for manufacture thereof

Semiconductor package including stacked chips and a redistribution layer (RDL) structure

Packaging methods and packaged semiconductor devices

Manufacturing and evaluation method of a semiconductor device

LED module

Flattened substrate surface for substrate bonding

Wire bonder and method of calibrating a wire bonder

Preform including a groove extending to an edge of the preform

Stacked microelectronic assembly with TSVS formed in stages and carrier above chip

Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods

Methods and arrangements relating to semiconductor packages including multi-memory dies

Finger sensor including encapsulating layer over sensing area and related methods

Heat sink for cooling of power semiconductor modules

Method of forming a power module with a magnetic device having a conductive clip

Active chip on carrier or laminated chip having microelectronic element embedded therein

Semiconductor device

Ultra fine pitch wedge for thicker wire

Low-stress TSV design using conductive particles

Chip package and method for forming the same

Semiconductor device having a bonding pad and shield structure and method of manufacturing the same

Package on package structures and methods for forming the same

Die package structure

Method of forming high voltage device

Illumination device with inclined light emitting element disposed on a transparent substrate

Adhesive composition for semiconductor and adhesive film including the same

Method of manufacturing semiconductor device having pad region for wire-bonding

Method of manufacturing semiconductor device

Stacked semiconductor package including connections electrically connecting first and second semiconductor packages

Direct metalization of electrical circuit structures

Multi-chip package assembly with improved bond wire separation

Semiconductor package and method for fabricating base for semiconductor package

Forming interconnect structures using pre-ink-printed sheets

Bumps for chip scale packaging including under bump metal structures with different diameters

Integrated circuit package and method of making

External storage device and method of manufacturing external storage device

Sensor system and cover device for a sensor system

Method of manufacturing semiconductor device, block stacked body, and sequential stacked body

Waterfall wire bonding

Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages

Semiconductor device with through silicon via and alignment mark

Resin sealing type semiconductor device and method of manufacturing the same, and lead frame

Method for bonding of group III-nitride device-on-silicon and devices obtained thereof

Semiconductor device and method of making bumpless flipchip interconnect structures

Barrier for through-silicon via

Apparatuses and methods to enhance passivation and ILD reliability

Semiconductor image sensor module and method of manufacturing the same

Substrate contact opening

Copper post solder bumps on substrates

Current sensor substrate and current sensor

Semiconductor device

Stub minimization using duplicate sets of terminals having modulo-x symmetry for wirebond assemblies without windows

Pillar on pad interconnect structures, semiconductor devices including same and related methods

Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices

Light emitting device package

OLED device in contact with a conductor

Lighting device with electrostatically adhered scattering particles and method of manufacture

Apparatus for package reinforcement using molding underfill

Light-emitting device with reflective resin

Power module semiconductor device

Method of manufacturing chip-stacked semiconductor package

Stacked packaging using reconstituted wafers

Semiconductor package and method for fabricating base for semiconductor package

Test structures for post-passivation interconnect

Method of manufacturing semiconductor device

Bump structure including nano-wires and a body connecting ends of the nano-wires, semiconductor package having the bump structure and method of manufacturing the semiconductor package

Multi-dimensional integrated circuit structures and methods of forming the same

Method of manufacturing a semiconductor device using markings on both lead frame and sealing body

Semiconductor device using EMC wafer support system and fabricating method thereof

High frequency device

Devices for cooling and power

Component carrier assembly having a trench structure which separates component carrier regions, and method for producing a plurality of component carrier regions

Semiconductor device

Electronic devices with embedded die interconnect structures, and methods of manufacture thereof

Semiconductor packages and methods of fabrication thereof

Integration of chips and silicon-based trench capacitors using low parasitic silicon-level connections

AC LED device and method for fabricating the same

Schottky diode

Method for producing a structure for microelectronic device assembly

Packaged microelectronic components

Semiconductor memory chips and stack-type semiconductor packages including the same

Semiconductor device assembly including a chip carrier, semiconductor wafer and method of manufacturing a semiconductor device

Organic thin film passivation of metal interconnections

Method for forming package-on-package structure

Chip arrangements and methods for manufacturing a chip arrangement

Amplifier circuit

Interconnection structure of package structure and method of forming the same

Semiconductor device and manufacturing method thereof

Semiconductor apparatus, electronic device, and method of manufacturing semiconductor apparatus

Interconnection structure having a via structure

Semiconductor device having conductive pads and a method of manufacturing the same

Plasma treatment for semiconductor devices

Semiconductor device, semiconductor integrated circuit device, and electronic device

Metal pad structure over TSV to reduce shorting of upper metal layer

Method of forming a plurality of bumps on a substrate and method of forming a chip package

Packaged nano-structured component and method of making a packaged nano-structured component

Integrated circuit package including wire bond and electrically conductive adhesive electrical connections

Packaged semiconductor assemblies and methods for manufacturing such assemblies

Memory device, laminated semiconductor substrate and method of manufacturing the same

Expanded semiconductor chip and semiconductor device

Enhanced capture pads for through semiconductor vias

Semiconductor device

Flexible routing for chip on board applications

Contoured package-on-package joint

Integrated circuit device including a copper pillar capped by barrier layer and method of forming the same

Semiconductor device with conductive vias

Method and system for controlling chip inclination during flip-chip mounting

Open solder mask and or dielectric to increase lid or ring thickness and contact area to improve package coplanarity

Integrated bondline spacers for wafer level packaged circuit devices

Die seal ring for integrated circuit system with stacked device wafers

Adjustable pick-up head and method for manufacturing a device

OPTO-COUPLER WITH LIGHT GUIDE

PACKAGE SUBSTRATE AND CHIP PACKAGE USING THE SAME

Through-substrate via shielding

IGBT die structure with auxiliary P well terminal

Structures and methods for determining TDDB reliability at reduced spacings using the structures

Laminate electronic device

Packaged integrated circuit having large solder pads and method for forming

Hybrid bonding mechanisms for semiconductor wafers

Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip

Interconnection structure

Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices

Bump interconnection techniques

Stacked dual-chip packaging structure and preparation method thereof

Semiconductor bonding structure and process

EPHEMERAL BONDING

Packages and methods for packaging

Light-emitting semiconductor packages and related methods

Method of and device for manufacturing LED assembly using liquid molding technologies

Optocoupler having lens layer

Bond pad structure and method of manufacturing the same

Electronic device and semiconductor device

Electrical connection for chip scale packaging

Semiconductor device and method of confining conductive bump material with solder mask patch

Method of manufacturing circuit board and chip package and circuit board manufactured by using the method

System in package manufacturing method using wafer-to-wafer bonding

Electronic devices with environmental sensors

Leadframe-based surface mount technology segmented display design and method of manufacture

Power converter package including vertically stacked driver IC

Embedded chip packages and methods for manufacturing an embedded chip package

Strong, heat stable junction

Metal bump joint structure

SEMICONDUCTOR DEVICES AND PROCESSING METHODS

Routing layer for mitigating stress in a semiconductor die

Packaging devices, methods of manufacture thereof, and packaging methods

Bump package and methods of formation thereof

Semiconductor device and production method therefor

PROCESS OF MAKING A STRUCTURE FOR ENCAPSULATING LED CHIPS AND THE LED CHIPS ENCAPSULATION STRUCTURE

Cylindrical embedded capacitors

Power modules and power module arrays having a modular design

Semiconductor device

Semiconductor package with bonding wires of reduced loop inductance

Cooling channels in 3DIC stacks

Nitride semiconductor device

Stub minimization for assemblies without wirebonds to package substrate

Semiconductor device and method of forming a PoP device with embedded vertical interconnect units

Semiconductor device and a method of manufacturing the same

Semiconductor device and method of forming conductive ink layer as interconnect structure between semiconductor packages

DIE DOWN INTEGRATED CIRCUIT PACKAGE WITH INTEGRATED HEAT SPREADER AND LEADS

Semiconductor device and method of forming non-linear interconnect layer with extended length for joint reliability

Microphone system with integrated passive device die

Pressure Sensor With Robustness Against Mounting Stress

Techniques for packaging multiple device components

Electrostatic protection for stacked multi-chip integrated circuits

Semiconductor structure and method for reducing noise therein

Package structure and method for manufacturing package structure

Two-sided-access extended wafer-level ball grid array (eWLB) package, assembly and method

Method of manufacture integrated circuit package

Packaged IC having printed dielectric adhesive on die pad

Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same

Transistor formation using cold welding

Semiconductor device with stacked semiconductor chips

Localized high density substrate routing

Three dimensional integrated circuits stacking approach

Apparatus and method for a component package

LEADFRAME HAVING SLOPED METAL TERMINALS FOR WIREBONDING

Semiconductor chip stack having improved encapsulation

High density second level interconnection for bumpless build up layer (BBUL) packaging technology

IC wafer having electromagnetic shielding effects and method for making the same

SYSTEM IN PACKAGE WITH EMBEDDED RF DIE IN CORELESS SUBSTRATE

MEMS microphone system for harsh environments

Power semiconductor housing with redundant functionality

Transistor formation using cold welding

Through silicon via wafer, contacts and design structures

PoP structure with electrically insulating material between packages

Mold chase for integrated circuit package assembly and associated techniques and configurations

Semiconductor package substrates having pillars and related methods

Semiconductor devices and methods of fabricating the same

Contact bumps methods of making contact bumps

Bump structures having an extension

Direct multiple substrate die assembly

Overcoming chip warping to enhance wetting of solder bumps and flip chip attaches in a flip chip package

Thermal dissipation through seal rings in 3DIC structure

Stacked-die including a die in a package substrate

Method and apparatus for multi-chip structure semiconductor package

Perimeter trench sensor array package

Semiconductor device with dummy metal protective structure around semiconductor die for localized planarization of insulating layer

Semiconductor devices having back side bonding structures

Integrated circuit, a chip package and a method for manufacturing an integrated circuit

Packaging substrate, method for manufacturing same, and chip packaging body having same

Wafer level embedded heat spreader

Semiconductor package device having passive energy components

Semiconductor chip, method for producing a semiconductor chip and method for soldering a semiconductor chip to a carrier

Through via structure and method

Post passivation interconnect structures and methods for forming the same

THREE-DIMENSIONAL SEMICONDUCTOR PACKAGE DEVICE HAVING ENHANCED SECURITY

Thermally enhanced package with lid heat spreader

Input output LED apparatus

Method for electrophoretically depositing a film on an electronic assembly

Techniques for reducing inductance in through-die vias of an electronic assembly

LOW STRESS COMPONENT PACKAGE

Overvoltage protection for multi-chip module and system-in-package

Radiation efficient integrated antenna

Interconnect assemblies with probed bond pads

Integrated circuit devices including a via structure and methods of fabricating integrated circuit devices including a via structure

Plating structure for wafer level packages

Packaging methods and packaged devices

Stress reduction apparatus

Extrusion-resistant solder interconnect structures and methods of forming

High power semiconductor package subsystems

Bridge interconnect with air gap in package assembly

Methods for manufacturing a chip arrangement, methods for manufacturing a chip package, a chip package and chip arrangements

Semiconductor devices with impedance matching-circuits

Integrated electronic device with transceiving antenna and magnetic interconnection

Bondable top metal contacts for gallium nitride power devices

Double solder bumps on substrates for low temperature flip chip bonding

Method of manufacturing semiconductor device

Method and apparatus for manufacturing lead frames

Vertically Stacked Power FETS and Synchronous Buck Converter Having Low On-Resistance

Thermally Enhanced Electronic Component Packages with Through Mold Vias

Ultra slim RF package for ultrabooks and smart phones

Voltage regulator using N-type substrate

Semiconductor device with pre-molding chip bonding

Identification mechanism for semiconductor device die

Sensor packaging method and sensor packages

Semiconductor device and method of manufacturing the same

Wire bond splash containment

Methods and apparatus for package on package structures

Structure to increase resistance to electromigration